VLSI Chip Design with the Hardware Description Language VERILOG
Springer Berlin (Verlag)
978-3-642-64650-8 (ISBN)
After emphasizing the economic importance of chip design as a key technology, the book deals with VLSI design (Very Large Scale Integration), the design of modern RISC processors, the hardware description language VERILOG, and typical modeling techniques. Numerous examples as well as a VERILOG training simulator are included on a disk.
Prof. Dr. Ulrich Golze ist Professor für den Entwurf integrierter Schaltungen an der TU Braunschweig.
Design of VLSI Circuits.- Design of VLSI Circuits.- RISC Architectures.- RISC Architectures.- Short Introduction to VERILOG.- Short Introduction to VERILOG.- External Specification of Behavior.- External Specification of Behavior.- Internal Specification of Coarse Structure.- Internal Specification of Coarse Structure.- Pipeline of the Coarse Structure Model.- Pipeline of the Coarse Structure Model.- Synthesis of Gate Model.- Synthesis of Gate Model.- Testing, Testability, Tester, and Testboard.- Testing, Testability, Tester, and Testboard.- Summary and Prospect.- Summary and Prospect.- HDL Models for Circuits and Architectures.- HDL Modeling with VERILOG.
| Erscheint lt. Verlag | 23.8.2014 |
|---|---|
| Mitarbeit |
Assistent: P. Blinzer, E. Cochlovius, M. Schäfers, K.-P. Wachsmann |
| Zusatzinfo | XIV, 360 p. 37 illus. |
| Verlagsort | Berlin |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Gewicht | 568 g |
| Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | Circuit • Circuit Design • Hardware • Hardwarebeschreibungssprache • Hardware-Beschreibungssprachen • Hardware Description Languages • LSI • microprocessor • microprocessors • Mikroprozessoren • programming • Programming language • RISC architectures • RISC-Architekturen • Schaltwerksentwurf • Verilog • VLSI |
| ISBN-10 | 3-642-64650-6 / 3642646506 |
| ISBN-13 | 978-3-642-64650-8 / 9783642646508 |
| Zustand | Neuware |
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