VLSI Chip Design with the Hardware Description Language VERILOG
An Introduction Based on a Large RISC Processor Design
Seiten
1996
Springer Berlin (Hersteller)
978-3-540-60032-9 (ISBN)
Springer Berlin (Hersteller)
978-3-540-60032-9 (ISBN)
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Hardware description languages (HDL), similar to programming languages, are central to digital circuit design. This book covers HDL, as well as VLSI design, the design of modern RISC processors, the hardware description language VERILOG, and typical modelling techniques.
Hardware description languages (HDL), similar to programming languages, are central to digital circuit design. This book covers HDL, as well as VLSI design, the design of modern RISC processors, the hardware description language VERILOG, and typical modelling techniques. The accompanying disk contains examples and a VERILOG training simulator.
Prof. Dr. Ulrich Golze ist Professor für den Entwurf integrierter Schaltungen an der TU Braunschweig.
| Zusatzinfo | " |
|---|---|
| Sprache | englisch |
| Gewicht | 714 g |
| Einbandart | gebunden |
| Schlagworte | RISC-Prozessor • VLSI |
| ISBN-10 | 3-540-60032-9 / 3540600329 |
| ISBN-13 | 978-3-540-60032-9 / 9783540600329 |
| Zustand | Neuware |
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