The System Designer's Guide to VHDL-AMS

Peter J. Ashenden received his B.Sc.(Hons) and Ph.D. from the University of Adelaide, Australia. He was previously a senior lecturer in computer science and is now a Visiting Research Fellow at the University of Adelaide. His research interests are computer organization and electronic design automation. Dr. Ashenden is also an independent consultant specializing in electronic design automation (EDA). He is actively involved in IEEE working groups developing VHDL standards, is the author of The Designer's Guide to VHDL and The Student's Guide to VHDL and co-editor of the Morgan Kaufmann series, Systems on Silicon. He is a senior member of the IEEE and a member of the ACM. Gregory D. Peterson is an assistant professor in electrical and computer engineering at the University of Tennessee. Previously, he was the chief technical officer at FTL Systems, a VHDL-AMS tool vendor, as well as a captain at the Air Force Research Laboratory. Dr. Peterson was the program manager for the VHDL-AMS language reference manual development contract, a participant in the VHDL-AMS standardization activities, and chair of the Accellera Users' Group targeting VHDL-AMS and related HDL technologies. He is a senior member of the IEEE and a member of the ACM. Darrell A. Teegarden has over fifteen years of experience in development of HDL-based models and software tools. His work includes contributions using the MAST(r) modeling language as well as development of VHDL-AMS models and simulation tools. He was principal investigator for a DARPA funded VHDL-AMS project (composite CAD program, focused at MEMS design and analysis). He currently manages VHDL-AMS related tool development for board and system analysis at Mentor Graphics Corporation in Wilsonville, Oregon. Darrell is an IEEE member and holds a B.S., Chemical Engineering from Oregon State University and an M.S., Electrical Engineering from Stanford University.

1 Fundamental Concepts 2 Scalar Data Types, Natures and Operations 3 Sequential Statements 4 Composite Data Types and Operations 5 Digital Modeling Constructs 6 Analog Modeling Constructs 7 Design Processing 8 Case Study 1: Mixed-Signal Focus 9 Subprograms 10 Packages and Use Clauses 11 Aliases 12 Generic Constants 13 Frequency and Transfer Function Modeling 14 Case Study 2: Mixed-Technology Focus 15 Resolved Signals 16 Components and Configurations 17 Generate Statements 18 Case Study 3: DC-DC Power Converter 19 Guards and Blocks 21 Files and Input/Output 22 Attributes and Groups 23 Case Study 4: Communication System 24 Miscellaneous Topics 25 Integrated System Modeling 26 Case Study 5: RC Airplane System A Using SPICE Models in VHDL-AMS B The Predefined Package Standard C IEEE Standard Packages D Related Standards E VHDL-AMS Syntax F Answers to Exercises G CD-ROM Guide References Index