Nanoelectronics for Next-Generation Integrated Circuits

Rohit Dhiman received his Bachelor of Technology degree in Electronics & Communication Engineering from HP University Shimla, India in 2007. He did his Master of Technology (M.Tech.) in VLSI Design from National Institute of Technology (NIT) Hamirpur in 2009. He was awarded with the Doctor of Philosophy (Ph.D.) from NIT Hamirpur in 2014. Presently, Dr. Rohit Dhiman is working as an Assistant Professor in Department of Electronics and Communication Engineering at NIT Hamirpur and is the author/co-author of reputed publications in Journals and Conference proceedings of repute. He has been awarded the Young Scientist Award from the Department of Science & Technology, Science and Engineering Research Board, GoI, New Delhi. He has also been bestowed with the prestigious Young Faculty Research Fellowship from the Ministry of Electronics and Information Technology (MeitY), Govt. of India and has three sponsored research projects to his credit. His major research interest is in the device and circuit modeling for low power VLSI design.

1. Emerging Graphene-based Electronics: Properties to Potentials. 2. Models for Modern Spintronics Memories with Layered Magnetic Interfaces. 3. Evaluation of Magnetic Anisotropy via Intrinsic Spin Infusion. 4. Quantum-dot Cellular Automata (QCA) Nanotechnology for the Next Generation Systems. 5. An Overview of Nanowire Field Effect Transistors For Future Nanoscale Integrated Circuits. 6. Investigation of Tunnel Field Effect Transistors (TFETs) for Label Free Biosensing. 7. Analog and Linearity Analysis of Vertical Nanowire TFET. 8. Effect of Variation in Gate Material on Enhancement mode P-GaN AlGaN/ GaN HEMT. 9. Electrical Modeling of One Selector-One resistor (1S-1R) for Mitigating the Sneak. 10. SRAM: An Essential Part of Integrated Circuits. 11. Implementation of 512bit SRAM Tile using Lector Technique for Leakage Power Reduction. 12. Characterization of Stochastic Process Variability Effects on Nano-scale Analog Circuits. 13. Versatile Single Input Single Output Filter Topology Suitable for Integrated Circuits. 14. Secured Integrated Circuit (IC/IP) Design Flow.