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High Performance Clock Distribution Networks

Eby G. Friedman (Herausgeber)

Buch | Hardcover
172 Seiten
1997 | Reprinted from THE JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS, 16:2-3
Kluwer Academic Publishers (Verlag)
978-0-7923-9967-4 (ISBN)
85,55 inkl. MwSt
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The volume presents a number of strategies for designing and building high performance clock distribution networks. It is composed of ten contributions from authors at academic and industrial institutions.
A number of fundamental topics in the field of high performance clock distribution networks is covered in this book. High Performance Clock Distribution Networks is composed of ten contributions from authors at academic and industrial institutions. Topically, these contributions can be grouped within three primary areas. The first topic area deals with exploiting the localized nature of clock skew. The second topic area deals with the implementation of these clock distribution networks, while the third topic area considers more long-range aspects of next-generation clock distribution networks. High Performance Clock Distribution Networks presents a number of interesting strategies for designing and building high performance clock distribution networks. Many aspects of the ideas presented in these contributions are being developed and applied today in next-generation high-performance microprocessors.

Introduction; E.G. Friedman. Clock Skew Optimization for Peak Current Reduction; L. Benini, et al. Clocking Optimization and Distribution in Digital Systems with Scheduled Skews; Hong-Yean Hsieh, et al. Buffered Clock Tree Synthesis with Non-Zero Clock Skew Scheduling for Increased Tolerance to Process Parameter Variations; J.L. Neves, E.G. Friedman. Useful-Skew Clock Routing with Gate Sizing for Low Power Design; J.G. Xi, W. W.-M. Dai. Clock Distribution Methodology for PowerPCTM Microprocessors; S. Ganguly, et al. Circuit Placement, Chip Optimization, and Wire Routing for IBM IC Technology; D.J. Hathaway, et al. Practical Bounded-Skew Clock Routing; A. Kahng, C.-W. A. Tsao. A Clock Methodology for High-Performance Microprocessors; K.M. Carrig, et al. Optical Clock Distribution in Electronic Systems; S.K. Tewksbury, L.A. Hornak. Timing of Multi-Gigahertz Rapid Single Flux Quantum Digital Circuits; K. Gaj, et al.

Zusatzinfo 147 black & white illustrations, biography
Sprache englisch
Maße 195 x 260 mm
Gewicht 622 g
Themenwelt Mathematik / Informatik Informatik Theorie / Studium
Technik Elektrotechnik / Energietechnik
ISBN-10 0-7923-9967-6 / 0792399676
ISBN-13 978-0-7923-9967-4 / 9780792399674
Zustand Neuware
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