Power Estimation on Electronic System Level using Linear Power Models (eBook)

eBook Download: PDF
2018 | 1. Auflage
XV, 336 Seiten
Springer-Verlag
978-3-030-01875-7 (ISBN)

Lese- und Medienproben

Power Estimation on Electronic System Level using Linear Power Models -  Stefan Schuermans,  Rainer Leupers
Systemvoraussetzungen
96,29 inkl. MwSt
  • Download sofort lieferbar
  • Zahlungsarten anzeigen
This book describes a flexible and largely automated methodology for adding the estimation of power consumption to high level simulations at the electronic system level (ESL). This method enables the inclusion of power consumption considerations from the very start of a design. This ability can help designers of electronic systems to create devices with low power consumption.  The authors also demonstrate the implementation of the method, using the popular ESL language 'SystemC'. This implementation enables most existing SystemC ESL simulations for power estimation with very little manual work. Extensive case-studies of a Network on Chip communication architecture and a dual-core application processor 'ARM Cortex-A9' showcase the applicability and accuracy of the method to different types of electronic devices. The evaluation compares various trade-offs regarding amount of manual work, types of ESL models, achieved estimation accuracy and impact on the simulation speed.

  • Describes a flexible and largely automated ESL power estimation method;
  • Shows implementation of power estimation methodology in SystemC;
  • Uses two extensive case studies to demonstrate method introduced.



Stefan Schuermans started his computer science studies at RWTH Aachen University in 2000 and received his diploma degree with honors in 2005. Afterwards, he worked for secunet  Security Networks AG, Essen as a software developer. In 2008, he joined the Chair for Software for Systems on Silicon at RWTH Aachen University. His research activities comprised simulation and estimation of power consumption at Electronic System Level as well as exploration and programming of MPSoC architectures. He joined Silexica GmbH, Köln in 2016 and adopted the position as Chief Architect in the same year. In 2018, he received his Ph.D. (Dr.-Ing.) degree from the Faculty of Electrical Engineering and Information Technology of RWTH Aachen University.

Rainer Leupers received the M.Sc. (Dipl.-Inform.) and Ph.D. (Dr. rer. nat.) degrees in Computer Science with honors from TU Dortmund in 1992 and 1997. From 1997-2001 he was the chief engineer at the Embedded Systems chair at TU Dortmund. In 2002, he joined RWTH Aachen University as a professor for Software for Systems on Silicon. His research comprises software development tools, processor architectures, and system-level electronic design automation, with focus on application-specific multicore systems. He published numerous books and technical papers and served in committees of the leading international EDA conferences. He received various scientific awards, including Best Paper Awards at DAC and twice at DATE, as well as several industrial awards. Dr. Leupers is also engaged as an entrepreneur and in turning novel technologies into innovations. He holds several patents on system-on-chip design technologies and has been a co-founder of LISATek (now with Synopsys), Silexica, and Secure Elements. He has served as consultant for various companies, as an expert for the European Commission, and in the management boards of large-scale projects like HiPEAC and UMIC. He is the coordinator of EU projects TETRACOM and TETRAMAX on academia/industry technology transfer.

Stefan Schuermans started his computer science studies at RWTH Aachen University in 2000 and received his diploma degree with honors in 2005. Afterwards, he worked for secunet  Security Networks AG, Essen as a software developer. In 2008, he joined the Chair for Software for Systems on Silicon at RWTH Aachen University. His research activities comprised simulation and estimation of power consumption at Electronic System Level as well as exploration and programming of MPSoC architectures. He joined Silexica GmbH, Köln in 2016 and adopted the position as Chief Architect in the same year. In 2018, he received his Ph.D. (Dr.-Ing.) degree from the Faculty of Electrical Engineering and Information Technology of RWTH Aachen University. Rainer Leupers received the M.Sc. (Dipl.-Inform.) and Ph.D. (Dr. rer. nat.) degrees in Computer Science with honors from TU Dortmund in 1992 and 1997. From 1997-2001 he was the chief engineer at the Embedded Systems chair at TU Dortmund. In 2002, he joined RWTH Aachen University as a professor for Software for Systems on Silicon. His research comprises software development tools, processor architectures, and system-level electronic design automation, with focus on application-specific multicore systems. He published numerous books and technical papers and served in committees of the leading international EDA conferences. He received various scientific awards, including Best Paper Awards at DAC and twice at DATE, as well as several industrial awards. Dr. Leupers is also engaged as an entrepreneur and in turning novel technologies into innovations. He holds several patents on system-on-chip design technologies and has been a co-founder of LISATek (now with Synopsys), Silexica, and Secure Elements. He has served as consultant for various companies, as an expert for the European Commission, and in the management boards of large-scale projects like HiPEAC and UMIC. He is the coordinator of EU projects TETRACOM and TETRAMAX on academia/industry technology transfer.

Introduction.- Background and Related Work.- ESL Power Estimation Methodology.- Implementation of ESL Power Estimation.- Network on Chip Case Study.- ARM Cortex-A9 Case Study.- Conclusions and Outlook.

Erscheint lt. Verlag 14.12.2018
Zusatzinfo XV, 336 p. 144 illus., 70 illus. in color.
Verlagsort Cham
Sprache englisch
Themenwelt Mathematik / Informatik Informatik
Technik Elektrotechnik / Energietechnik
Schlagworte Flexible and Automated ESL Power Estimation Method • Network-on-Chip communication architecture • Performance Optimization under Power Constraints • Power Estimation for ARM Cortex • Power Estimation for Network on Chip
ISBN-10 3-030-01875-X / 303001875X
ISBN-13 978-3-030-01875-7 / 9783030018757
Haben Sie eine Frage zum Produkt?
PDFPDF (Wasserzeichen)
Größe: 14,9 MB

DRM: Digitales Wasserzeichen
Dieses eBook enthält ein digitales Wasser­zeichen und ist damit für Sie persona­lisiert. Bei einer missbräuch­lichen Weiter­gabe des eBooks an Dritte ist eine Rück­ver­folgung an die Quelle möglich.

Dateiformat: PDF (Portable Document Format)
Mit einem festen Seiten­layout eignet sich die PDF besonders für Fach­bücher mit Spalten, Tabellen und Abbild­ungen. Eine PDF kann auf fast allen Geräten ange­zeigt werden, ist aber für kleine Displays (Smart­phone, eReader) nur einge­schränkt geeignet.

Systemvoraussetzungen:
PC/Mac: Mit einem PC oder Mac können Sie dieses eBook lesen. Sie benötigen dafür einen PDF-Viewer - z.B. den Adobe Reader oder Adobe Digital Editions.
eReader: Dieses eBook kann mit (fast) allen eBook-Readern gelesen werden. Mit dem amazon-Kindle ist es aber nicht kompatibel.
Smartphone/Tablet: Egal ob Apple oder Android, dieses eBook können Sie lesen. Sie benötigen dafür einen PDF-Viewer - z.B. die kostenlose Adobe Digital Editions-App.

Buying eBooks from abroad
For tax law reasons we can sell eBooks just within Germany and Switzerland. Regrettably we cannot fulfill eBook-orders from other countries.

Mehr entdecken
aus dem Bereich
Konzepte, Methoden, Lösungen und Arbeitshilfen für die Praxis

von Ernst Tiemeyer

eBook Download (2023)
Carl Hanser Verlag GmbH & Co. KG
69,99
Konzepte, Methoden, Lösungen und Arbeitshilfen für die Praxis

von Ernst Tiemeyer

eBook Download (2023)
Carl Hanser Verlag GmbH & Co. KG
69,99