Handbook of Thin Film Deposition

Former Assistant Professor in Materials Science at the University of Arizona with extensive professional experience as a technologist at both IBM and Intel Corporations. Dr. Seshan passed away in 2017. Dominic Schepis has over 35 years in the semiconductor industry supporting logic and memory technologies. As Principal Member of the Technical Staff at GlobalFoundries, Dominic worked on process development and integration for various advanced node CMOS technologies. His early work on SOI CMOS integration was instrumental to bringing this technology for use in IBM servers. He also was appointed Master Inventor at both IBM and Globalfoundries and served on their patent evaluation boards. A graduate from Rensselaer Polytechnic Institute, he joined IBM’s Semiconductor Research and Development Center (SRDC) and has worked on a variety of advanced research and development projects and supported process sectors including reactive ion etching, epitaxial film growth, process integration, and other unit processes. During his tenure there, he co-authored over 29 technical journal papers and has over 100 issued US patents.

Section 1 - SCALING 1. A Perspective on Today’s Scaling Challenges and Possible Future Direction 2. Limits and Hurdles To Continued Cmos Scaling 3. Reliability Issues: Reliability Imposed Limits to Scaling 4. Thermal Engineering at the Limits of the CMOS Era

Section 2 - THIN FILM DEPOSITION EQUIPMENT AND PROCESSING 5. Limits Of Gate Dielectrics Scaling 6. Process Technology for Copper Interconnects 7. Sputter Processing 8. Thin Film Deposition for Front End of Line: The Effect of the Semiconductor Scaling, Strain Engineering and Pattern Effects 9. Equipment in CVD Processing 10. CMP Method and Practice 11. Atomic Layer Deposition: Fundamentals, Practice and Challenges 12. Optical Thin Films 13. Semiconductor Memory