System Reduction for Nanoscale IC Design (eBook)

Peter Benner (Herausgeber)

eBook Download: PDF
2017 | 1st ed. 2017
XI, 197 Seiten
Springer International Publishing (Verlag)
978-3-319-07236-4 (ISBN)

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This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle.

The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.

Preface 6
Contents 9
1 Model Order Reduction of Integrated Circuitsin Electrical Networks 12
1.1 Introduction 12
1.2 Basic Models 14
1.2.1 Coupling 15
1.3 Simulation of the Full System 18
1.3.1 Standard Galerkin Finite Element Approach 18
1.3.2 Mixed Finite Element Approach 19
1.4 Model Order Reduction Using POD 24
1.4.1 Numerical Investigation 27
1.4.2 Numerical Investigation, Position of the Semiconductor in the Network 28
1.4.3 MOR for the Nonlinearity with DEIM 30
1.4.4 Numerical Implementation and Results with DEIM 31
1.5 Residual-Based Sampling 34
1.5.1 Numerical Investigation for Residual Based Sampling 37
1.6 PABTEC Combined with POD MOR 38
1.6.1 Decoupling 39
1.6.2 Model Reduction Approach 41
1.6.3 Numerical Experiments 42
References 45
2 Element-Based Model Reduction in Circuit Simulation 49
2.1 Introduction 49
2.2 Circuit Equations 50
2.2.1 Graph-Theoretic Concepts 51
2.2.2 Modified Nodal Analysis and Modified Loop Analysis 51
2.2.3 Linear RLC Circuits 55
2.2.3.1 Passivity 56
2.2.3.2 Stability 57
2.2.3.3 Reciprocity 57
2.3 Model Reduction of Linear Circuits 57
2.3.1 Balanced Truncation for RLC Circuits 58
2.3.2 Balanced Truncation for RC Circuits 62
2.3.2.1 RCI Circuits 62
2.3.2.2 RCV Circuits 64
2.3.2.3 RCIV Circuits 66
2.3.3 Numerical Aspects 69
2.4 Model Reduction of Nonlinear Circuits 71
2.5 Solving Matrix Equations 76
2.5.1 ADI Method for Projected Lyapunov Equations 77
2.5.2 Newton's Method for Projected Riccati Equations 78
2.6 MATLAB Toolbox PABTEC 81
2.7 Numerical Examples 85
References 92
3 Reduced Representation of Power Grid Models 96
3.1 Introduction 96
3.2 System Description 98
3.2.1 Basic Definitions 98
3.2.2 Benchmark Systems 103
3.2.2.1 A Test Circuit Example 103
3.2.2.2 Linear Subdomain for Non-linear Electro-Quasistatic Field Simulations 103
3.3 Terminal Reduction Approaches 105
3.3.1 (E)SVDMOR 105
3.3.2 TermMerg 110
3.3.2.1 The k-Means Clustering Algorithm 111
3.3.2.2 The Reduction Step 112
3.3.3 SparseRC 112
3.3.3.1 MOR via Graph Partitioning and EMMP 113
3.3.4 MOR for Many Terminals via Interpolation 115
3.3.4.1 Tangential Interpolation and the Loewner Concept 115
3.4 ESVDMOR in Detail 117
3.4.1 Stability, Passivity, Reciprocity 117
3.4.1.1 Stability 118
3.4.1.2 Passivity 119
3.4.1.3 Reciprocity 121
3.4.2 Error Analysis 123
3.4.2.1 Particular Error Bounds 124
3.4.2.2 Total ESVDMOR Error Bound 126
3.4.3 Implementation Details 129
3.4.3.1 The Implicitly Restarted Arnoldi Method 130
3.4.3.2 The Jacobi-Davidson SVD Method 131
3.4.3.3 Efficiency Issues 135
3.4.3.4 Truncated SVD of the Input Response Moment Matrix MI 136
3.4.3.5 Truncated SVD of the Output Response Moment Matrix MO 138
3.5 Summary and Outlook 140
References 141
4 Coupling of Numeric/Symbolic Reduction Methods for Generating Parametrized Models of NanoelectronicSystems 144
4.1 Introduction 144
4.1.1 Symbolic Modeling of Analog Circuits 146
4.2 Hierarchical Modelling and Model Reduction 146
4.2.1 Workflow for Subsystem Reductions 147
4.2.2 Subsystem Sensitivities 149
4.2.3 Subsystem Ranking 151
4.2.4 Algorithm for Hierarchical Model Reduction 153
4.3 Implementations 153
4.4 Applications 155
4.4.1 Differential Amplifier 155
4.4.2 Reduction of the Transmission Line L1 by Using an Adapted PABTEC Algorithm 158
4.4.3 Operational Amplifier 159
4.5 Conclusions 164
References 164
5 Low-Rank Cholesky Factor Krylov Subspace Methodsfor Generalized Projected Lyapunov Equations 166
5.1 Introduction 166
5.2 Balanced Truncation 167
5.2.1 Introduction to Balanced Truncation 167
5.2.2 Numerical Methods for Projected, Generalized Lyapunov Equations 169
5.3 Low-Rank Cholesky Factor Krylov Subspace Methods 170
5.3.1 Low-Rank Krylov Subspace Methods 171
5.3.2 Low-Rank Cholesky Factor Preconditioning 172
5.3.3 Low-Rank Pseudo Arithmetic 173
5.3.4 Approximate LRCF-ADI Preconditioning 177
5.3.5 Selected Low-Rank Krylov Subspace Methods 178
5.3.6 Reduced Lyapunov Equation 180
5.4 Numerical Results 182
5.4.1 Model Problems 183
5.4.2 Different Krylov Subspace Methods and Their Efficiency with Respect to the Selection of Shifts 185
5.4.3 Truncated QR? Decomposition 188
5.4.4 Evolution of the Rank Representations in the Low-Rank CG Method 192
5.4.5 Numerical Solution Based on Reduced LyapunovEquations 194
5.4.6 Incomplete LU Versus LU 194
5.4.7 Parallel Approach 197
5.5 Conclusions 200
References 200
Index 203

Erscheint lt. Verlag 2.6.2017
Reihe/Serie Mathematics in Industry
Mathematics in Industry
Zusatzinfo XI, 197 p. 73 illus., 39 illus. in color.
Verlagsort Cham
Sprache englisch
Themenwelt Mathematik / Informatik Informatik Programmiersprachen / -werkzeuge
Informatik Weitere Themen CAD-Programme
Mathematik / Informatik Mathematik
Technik Elektrotechnik / Energietechnik
Schlagworte ​model order reduction • circuit simulation • computational nanoelectronics • Device simulation • ​model order reduction • Model order reduction • nanoelectronics
ISBN-10 3-319-07236-6 / 3319072366
ISBN-13 978-3-319-07236-4 / 9783319072364
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