CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

Process-Aware SRAM Design and Test
Buch | Hardcover
194 Seiten
2008
Springer-Verlag New York Inc.
978-1-4020-8362-4 (ISBN)

Lese- und Medienproben

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies - Andrei Pavlov, Manoj Sachdev
171,19 inkl. MwSt
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

Prof. Sachdev has authored several successful books with Springer

and Motivation.- SRAM Circuit Design and Operation.- SRAM Cell Stability: Definition, Modeling and Testing.- Traditional SRAM Fault Models and Test Practices.- Techniques for Detection of SRAM Cells with Stability Faults.- Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques.

Reihe/Serie Frontiers in Electronic Testing ; 40
Zusatzinfo XVI, 194 p.
Verlagsort New York, NY
Sprache englisch
Maße 155 x 235 mm
Themenwelt Mathematik / Informatik Informatik Theorie / Studium
Informatik Weitere Themen Hardware
Technik Elektrotechnik / Energietechnik
ISBN-10 1-4020-8362-9 / 1402083629
ISBN-13 978-1-4020-8362-4 / 9781402083624
Zustand Neuware
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