VLSI-SoC: Advanced Topics on Systems on a Chip -

VLSI-SoC: Advanced Topics on Systems on a Chip

A Selection of Extended Versions of the Best Papers of the Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2007), October 15-17, 2007, Atlanta, USA
Buch | Softcover
290 Seiten
2011 | Softcover reprint of hardcover 1st ed. 2009
Springer-Verlag New York Inc.
978-1-4419-4708-6 (ISBN)
139,05 inkl. MwSt
This book contains extended and revised versions of the best papers that were presented during the fifteenth edition of the IFIP/IEEE WG10.5 International Conference on Very Large Scale Integration, a global System-on-a-Chip Design & CAD conference. The 15th conference was held at the Georgia Institute of Technology, Atlanta, USA (October 15-17, 2007). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier, Darmstadt, Perth and Nice. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5 and by the IEEE Council on Electronic Design Automation (CEDA), is to provide a forum to exchange ideas and show industrial and academic research results in the field of microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI-SoC conferences aim to address these exciting new issues.

Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies..- Use of Gray Decoding for Implementation of Symmetric Functions.- A Programmable Multi-Dimensional Analog Radial-Basis- Function-Based Classifier.- Compression-based SoC Test Infrastructures.- Parametric Structure-Preserving Model Order Reduction.- ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching.- QoS in Networks-on-Chip – Beyond Priority and Circuit Switching Techniques.- Accurate Performance Estimation using Circuit Matrix Models in Analog Circuit Synthesis.- Statistical and Numerical Approach for a Computer efficient circuit yield analysis.- SWORD: A SAT like Prover Using Word Level Information.- A new analytical approach of the impact of jitter on continuous time delta sigma converters..- An adaptive genetic algorithm for dynamically reconfigurable modules allocation.- The Hazard-Free Superscalar Pipeline Fast Fourier Transform Architecture and Algorithm.- System and Procesor Design Effort Estimation.- Reconfigurable Acceleration with Binary Compatibility for General Purpose Processors.- First Order, Quasi-Static, SOI Charge Conserving Power Dissipation Model.

Reihe/Serie IFIP International Federation for Information Processing ; 291
Zusatzinfo 17 Illustrations, black and white; X, 290 p. 17 illus.
Verlagsort New York, NY
Sprache englisch
Maße 155 x 235 mm
Themenwelt Mathematik / Informatik Informatik Software Entwicklung
Informatik Theorie / Studium Algorithmen
Informatik Theorie / Studium Kryptologie
Schlagworte CAD • CEDA • Chip integration • IFIP TC 10 • IFIP WG 10.5 • microelectronics • System-on-a-Chip Design • VLSI-SoC
ISBN-10 1-4419-4708-6 / 1441947086
ISBN-13 978-1-4419-4708-6 / 9781441947086
Zustand Neuware
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