SYNTHESIS & OPTIMIZATION OF DI
McGraw-Hill Professional (Verlag)
978-0-07-113271-8 (ISBN)
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This new graduate textbook in computer engineering offers a modern, up-to-date look at computer aided design of VLSI circuits at the functional and logic level by addressing an interesting topic in CAD for digital circuits: design synthesis of detailed specifications from abstract models. Topics covered include hardware modeling, compilation techniques for hardware models, high-level synthesis, logic synthesis, and library mapping algorithms. Course titles include Digital CAD, Advanced Logic Design or Complements of VLSI Design.
Giovani De Micheli is Associate Professor of Electrical Engineering and, by courtesy, of Computer Science at Stanoford University. from 1984 to 1986 he worked at the IBM T.J. Waston Research Center. Yorktown Heights, where he was project leader of the Design Automation Workstation group. previously he held positions at the Department of Electronics of the Politecnico di Milano, Italy and at Harris Semiconductor,Melbourne, florida . He holds a Nuclear Engineer degree and a Ph.D degree in electrical engineering and Computer Science.
Chapter 1: IntroductionChapter 2: BackgroundChapter 3: Hardware ModelingChapter 4: Architectural SynthesisChapter 5: Scheduling AlgorithmsChapter 6: Resource Sharing and BindingChapter 7: Two-Level Combinational Logic OptimizationChapter 8: Multiple-Level Combinational Logic OptimizationChapter 9: Sequential Logic OptimizationChapter 10: Cell-library BindingChapter 11: State-of-the-art and Future Trends
| Erscheint lt. Verlag | 31.7.1994 |
|---|---|
| Zusatzinfo | 150ill. |
| Sprache | englisch |
| Maße | 152 x 229 mm |
| Gewicht | 955 g |
| Themenwelt | Informatik ► Grafik / Design ► Digitale Bildverarbeitung |
| Mathematik / Informatik ► Informatik ► Theorie / Studium | |
| Informatik ► Weitere Themen ► CAD-Programme | |
| Technik ► Elektrotechnik / Energietechnik | |
| ISBN-10 | 0-07-113271-6 / 0071132716 |
| ISBN-13 | 978-0-07-113271-8 / 9780071132718 |
| Zustand | Neuware |
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