Smart Power Integration

Preface ix

Chapter 1. Overview of Smart Power Integration 1

1.1. Introduction 1

1.2. Smart PIC applications 2

1.2.1. Flat panel displays 4

1.2.2. Computer power supplies and disk drivers 4

1.2.3. Variable speed motor drives 4

1.2.4. Factory automation 4

1.2.5. Telecommunications 5

1.2.6. Appliance controls 5

1.2.7. Consumer electronics 5

1.2.8. Lighting controls 5

1.2.9. Smart homes 6

1.2.10. Aircraft electronics (Avionics) 6

1.2.11. Automotive electronics 6

1.3. Historical view of the MOS power devices 6

1.4. Smart PIC fabrication processes 9

1.4.1. Dedicated processes 9

1.4.2. Compatible processes 10

1.5. Insulation techniques 10

1.5.1. Self-insulation 10

1.5.2. Dielectric insulation 11

1.5.3. Junction insulation 11

1.5.4. Advanced junction insulation techniques 12

1.6. Motivation of the book 13

Chapter 2. Modular or Hybrid Integration 17

2.1. Introduction 17

2.2. IGBT technology evolution 18

2.2.1. IGBT presentation 18

2.2.2. Epitaxial structure with buffer layer and reduction of carrier lifetime 30

2.2.3. Homogeneous structure with control of load injection 36

2.2.4. Silicon direct bonding-IGBT 38

2.2.5. IGBT trench 39

2.2.6. Lateral IGBT 39

2.3. Assembly technology 40

2.4. Thermal aspect 41

2.4.1. Thermal impedance 43

2.5. Applications fields 45

2.5.1. IGBT power modules for electric traction applications 45

2.5.2. IPM for low- and medium-power applications 48

Chapter 3. Monolithic Integration 51

3.1. Functional integration and smart power 51

3.2. Transition from low-voltage technology (CMOS) to high voltage 52

3.2.1. Introduction 52

3.2.2. A typical CMOS technology 62

3.2.3. Breakdown voltage of a microelectronics structure 63

3.2.4. Improved junctions breakdown by guard techniques 68

3.2.5. Improvement using electrical insulation techniques 73

3.2.6. Review of the main MOS devices for high-voltage integrated circuits 75

3.3. Combining analog and digital (mixed) 82

3.3.1. Analog: basic functional blocks in CMOS technology and basic analog structures 82

3.3.2. Reminder on the general structure of the operational amplifier 88

3.3.3. Digital 96

3.3.4. The notion of codesign 96

3.3.5. Assessment 99

Chapter 4. Technology for Simulating Power Integrated Systems 101

4.1. Introduction 101

4.2. Hardware and software design of engine control 102

4.2.1. Functional specification 105

4.2.2. Exploring the space of solutions: the partitioned specification model 106

4.2.3. Mixed synthesis, hardware and software code 107

4.2.4. Model functional testing 110

4.2.5. Synthesis of the approach and related tools of the functional model 111

4.3. Proposed design stream: related tools 112

4.3.1. Accuracy 113

4.3.2. Resources and system architecture 113

4.3.3. Realization 120

4.4. Conclusion 123

Chapter 5. 3D Electrothermal Integration 125

5.1. Introduction 125

5.2. Electrothermal modeling of substrate 126

5.2.1. Brief introduction to mathematical tools 127

5.2.2. Simulation results by using Green/TLM 132

5.2.3. Thermal management in a 3D-integrated figure 146

5.2.4. Thermo-mechanical design 156

5.2.5. Thermal modeling of the connectors 157

5.3. Heat analysis for 3D ICs 157

5.3.1. 3D IC heat transfer compact model without TSVs 157

5.3.2. IC model for analyzing the temperature of the chip of the top layer taking into account the TSVs 159

5.3.3. 3D IC thermal modeling result 161

5.3.4. Electrothermal (ET) modeling of very large scale circuits 166

5.3.5. Electrical modeling of very large scale 167

5.3.6. Thermal modeling of very large scale circuits 170

5.3.7. Electrothermal modeling of very large scale circuits 171

5.4. Conclusion 184

5.5. Heat pipe 185

5.6. Conclusion 203

Chapter 6. Substrate Coupling in Smart Power Integration 205

6.1. Introduction 205

6.2. Part I: smart power integration using the DTI technique 205

6.2.1 DTI technology 205

6.2.2 DTI structure 206

6.2.3. LDMOSFET performance with DTI 207

6.2.4. Parasitic suppression in 2D smart power ICs with deep trench 211

6.2.5. HV dynamic signal impact on CMOS devices 215

6.2.6. Mixed-mode CMOS-substrate coupling simulation 227

6.3. Part II: smart power integration using stacked 3D technology 232

6.3.1. From 2D planar integration to 3D integration 232

6.3.2. 3D smart power integration 234

6.3.3. TSV-CMOS mixed-mode coupling 253

6.3.4. Electromagnetic impact of TSV in RF range 264

Conclusion 271

Appendix: Semiconductor Physical Models 275

References 299

Index 301