Design of Wideband Communications Systems: Mitigating the Analog-to-Digital Conversion Bottleneck

Future wireless communications systems are envisioned to utilize the vast amount of available spectrum in the sub-terahertz bands above 100 GHz to provide data rates in the order of 100 Gbit/s and above. However, the analog-to-digital converter (ADC) power consumption is anticipated to be a significant bottleneck if conventional system designs are employed at these frequencies, e.g., because the ADC power consumption grows quadratically with the input bandwidth for wideband systems. Hence, we study two system designs aiming to mitigate the ADC bottleneck.
First, we propose a holistic design of an acquisition system for a multivariate analog input process, with the goal to recover a random parameter vector, referred to as the task. Conventional designs commonly employ task-agnostic ADCs designed to minimize the mean squared error (MSE) in reconstructing the analog input signal. In contrast, we aim to jointly optimize the acquisition system in light of the task under a constraint on the bit rate at the output of the ADCs, which relates to the system's implementation complexity and power consumption. We analytically characterize the MSE-minimizing analog and digital filters for a fixed ADC configuration and the corresponding minimum achievable MSE. From these analytical results, we obtain design guidelines for practical acquisition systems. A numerical study of the proposed design shows the potential for considerable savings in terms of the digital rate budget and for moderate ADC power consumption savings.
Second, as an alternative approach, we consider shifting the resolution from the amplitude to the time domain, i.e., by employing 1-bit quantization and temporal oversampling. This is a very promising approach to mitigate the ADC bottleneck because the power consumption typically grows exponentially with the amplitude resolution measured in bits. It is also a good match for modern semiconductor processes that offer fast switching capabilities while providing only limited voltage headroom for amplitude processing. For such systems employing 1-bit quantization and temporal oversampling, we present a zero-crossing modulation (ZXM) transceiver design including an efficient mapping of bits onto the distance between zero-crossings, which encode the information, and a receiver generating soft information despite 1-bit quantization. The proposed transceiver is tailored and evaluated for a wideband line-of-sight channel model capturing transmission at the considered frequency bands. We show numerically that the proposed transceiver design outperforms state-of-the-art 1-bit temporal oversampling systems in terms of spectral efficiency and allows for significant ADC power consumption savings, hence, mitigating the ADC bottleneck. However, the improved energy efficiency comes at the cost of a reduced spectral efficiency compared to conventional systems employing high-resolution quantization.