Nanoscale Semiconductors
CRC Press (Verlag)
978-1-032-30754-1 (ISBN)
This reference text discusses conduction mechanism, structure construction, operation, performance evaluation and applications of nanoscale semiconductor materials and devices in VLSI circuits design.
The text explains nano materials, devices, analysis of its design parameters to meet the sub-nano-regime challenges for CMOS devices. It discusses important topics including memory design and testing, fin field-effect transistor (FinFET), tunnel field-effect transistor (TFET) for sensors design, carbon nanotube field-effect transistor (CNTFET) for memory design, nanowire and nanoribbons, nano devices based low-power-circuit design, and microelectromechanical systems (MEMS) design.
The book
discusses nanoscale semiconductor materials, device models, and circuit design
covers nanoscale semiconductor device structures and modeling
discusses novel nano-semiconductor devices such as FinFET, CNTFET, and Nanowire
covers power dissipation and reduction techniques
Discussing innovative nanoscale semiconductor device structures and modeling, this text will be useful for graduate students, and academic researchers in diverse areas such as electrical engineering, electronics and communication engineering, nanoscience, and nanotechnology. It covers nano devices based low-power-circuit design, nanoscale devices based digital VLSI circuits, and novel devices based analog VLSI circuits design.
Dr. Balwinder Raj (MIEEE’2006) earned his B. Tech, Electronics Engineering (PTU Jalandhar), M. Tech-Microelectronics (PU Chandigarh) and Ph.D-VLSI Design (IIT Roorkee), India in 2004, 2006 and 2010 respectively. For further research work, European Commission awarded him "Erasmus Mundus" Mobility of Life research fellowship for postdoc research work at University of Rome, Tor Vergata, Italy in 2010-2011. Dr. Raj received India4EU (India for European Commission) Fellowship and worked as visiting researcher at KTH University, Stockholm, Sweden, Oct-Nov 2013. He also visited Aalto University Finland as visiting researcher during June 2017.Currently, he is working as Associate Professor at National Institute of Technical Teachers Training and Research Chandigarh, India since Dec 2019. Earlier, he was worked at National Institute of Technology (NIT Jalandhar), Punjab, India from May 2012 to Dec 2019. Dr. Raj also worked as Assistant Professor at ABV-IIITM Gwalior (An autonomous institute established by Ministry of HRD, Govt. of India) July 2011 to April 2012. He received Best Teacher Award from Indian Society for Technical Education (ISTE) New Delhi in 26th July 2013. Dr. Raj received Young Scientist Award from Punjab Academy of Sciences during 18th Punjab Science Congress held on 9th Feb 2015. He also received a research paper award in an international conference on Electrical and Electronics Engineering held at Pattaya, Thailand from 11th to 12th July 2015. Dr. Raj has authored/co-authored 3 books, 8 book chapters and more than 70 research papers in peer reviewed international/national journals and conferences. His areas of interest in research are Classical/Non-Classical Nanoscale Semiconductor Device Modeling; Nanoelectronic and their applications in hardware security, sensors and circuit design, FinFET based Memory design, Low Power VLSI Design, Digital/Analog VLSI Design and FPGA implementation. Dr Ashish Raman earned his B.E, Electronics and Communication Engineering, M. Tech-Microelectronics and VLSI Design (Shri G S Institute of Technology and Science, Indore) and Ph.D-VLSI Design (NIT Jalandhar), India in 2003, 2005 and 2015 respectively. Currently, he is working as Assistant Professor at National Institute of Technology, Jalandhar, India since Sep 2007. Earlier, he was worked at National Institute of Technology (NIT Jalandhar), Durgapur, India from January 2007 to August 2007. Dr. Raman has authored/co-authored 1 book, 5 book chapters and more than 50 research papers in peer reviewed international/national journals and conferences. His areas of interest in research are VLSI Circuit Design, Nanoscale Semiconductor Device; Nanoelectronic, Modeling, Low Power VLSI Design, Digital/Analog VLSI Design and FPGA implementation, Sensor and circuit applications. He is working as principal investigator of various funded projects such as SMDP-C2SD sponsored by MeitY, FIST Sponsored by DST, FPGA based High Speed CCSDS Processor for Baseband Receiver, Funded by ISRO Banglore, and many more projects. Dr. Raman is a member of the IEEE Electron Devices Society, the IEEE Solid-State Circuits Society, and the Institution of Engineers Society, India
Chapter 1: Tunneling FETs, the Non-Conventional Transistor basics, Chapter 2: Fundamentals of TFET and Its Applications, Chapter 3: Trends and Challenges in VLSI Fabrication Technology, Chapter 4: The Transition from MOSFET to MBCFET: Fabrication and Transfer Characteristics, Chapter 5: High Speed Nano Scale Interconnects, Chapter 6: Performance Review of Static Memory Cell based on CMOS, FinFET, CNTFET and GNRFET design, Chapter 7: Novel Subthreshold Modelling of FinFET based energy-effective circuit designs, Chapter 8: Noise Performance of IMPATT Diode oscillatorat Different mm-Wave Frequencies, Chapter 9: Testing of Semiconductor Scaled Devices, Chapter 10: Investigation of TFET for Mixed Signal and Hardware Security Applications, Chapter 11: Junctionless Transistors: Evolution and Prospects
| Erscheinungsdatum | 17.08.2022 |
|---|---|
| Zusatzinfo | 19 Tables, black and white; 99 Line drawings, black and white; 47 Halftones, black and white; 88 Illustrations, color; 58 Illustrations, black and white |
| Verlagsort | London |
| Sprache | englisch |
| Maße | 156 x 234 mm |
| Gewicht | 508 g |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| Technik ► Maschinenbau | |
| Technik ► Umwelttechnik / Biotechnologie | |
| ISBN-10 | 1-032-30754-4 / 1032307544 |
| ISBN-13 | 978-1-032-30754-1 / 9781032307541 |
| Zustand | Neuware |
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