Nanoscale Devices

Brajesh Kumar Kaushik received Doctorate of Philosophy (Ph.D.) in 2007 from Indian Institute of Technology, Roorkee, India. He joined Department of Electronics and Communication Engineering, Indian Institute of Technology, Roorkee, as Assistant Professor in December 2009; and since April 2014 he has been an Associate Professor. He has served as General Chair, Technical Chair, and Keynote Speaker of many reputed international and national conferences. Dr. Kaushik is a Senior Member of IEEE and member of many expert committees constituted by government and non-government organizations. He is Editor of IEEE Transactions on Electron Devices; Associate Editor of IET Circuits, Devices & Systems; Editor of Microelectronics Journal, Elsevier; Editor of Journal of Electrical and Electronics Engineering Research, Academic Journals; and Editorial board member of Journal of Engineering, Design and Technology, Emerald. He also holds the position of Editor-in-Chief of International Journal of VLSI Design & Communication Systems, and SciFed Journal of Spintronics & Quantum Electronics. He has received many awards and recognitions from the International Biographical Center (IBC), Cambridge. His name has been listed in Marquis Who’s Who in Science and Engineering® and Marquis Who’s Who in the World®. Dr. Kaushik has been conferred with Distinguished Lecturer award of IEEE Electron Devices Society (EDS) to offer EDS Chapters with quality lectures in his research domain. His research interests are in the areas of high-speed interconnects, low-power VLSI design, memory design, carbon nanotube-based designs, organic electronics, FinFET device circuit co-design, electronic design automation (EDA), spintronics-based devices, circuits and computing, image processing, and optics & photonics based devices.

Section I Nanoscale Transistors 1. Simulation of Nanoscale Transistors from Quantum and Multiphysics Perspective 2. Variability in Nanoscale Technology and EδDC MOS Transistor 3. Effect of Ground Plane and Strained Silicon on Nanoscale FET Devices Section II Novel MOSFET Structures 4. U-Shaped Gate Trench Metal Oxide Semiconductor Field Effect Transistor: Structures and Characteristics 5. Operational Characteristics of Vertically Diffused Metal Oxide Semiconductor Field Effect Transistor 6. Modeling of Double-Gate MOSFETs Section III Modeling of Tunnel FETs 7. TFETs for Analog Applications 8. Dual Metal–Double Gate Doping-Less TFET: Design and Investigations Section IV Graphene and Carbon Nanotube Transistors and Applications 9. Modeling of Graphene Plasmonic Terahertz Devices 10. Analysis of CNTFET for SRAM Cell Design 11. Design of Ternary Logic Circuits Using CNFETs Section V Modeling of Emerging Non-Silicon Transistors 12. Different Analytical Models for Organic Thin-Film Transistors: Overview and Outlook 13. A Fundamental Overview of High Electron Mobility Transistor and Its Applications Section VI Emerging Nonvolatile Memory Devices and Applications 14. Spintronic-Based Memory and Logic Devices 15. Fundamentals, Modeling, and Application of Magnetic Tunnel Junctions 16. RRAM Devices: Underlying Physics, SPICE Modeling, and Circuit Applications 17. Evaluation of Nanoscale Memristor Device for Analog and Digital Application