Separation Logic for High-level Synthesis - Felix Winterstein

Separation Logic for High-level Synthesis

Buch | Softcover
XIX, 132 Seiten
2018 | 1. Softcover reprint of the original 1st ed. 2017
Springer International Publishing (Verlag)
978-3-319-85094-8 (ISBN)
106,99 inkl. MwSt

This book presents novel compiler techniques, which combine a rigorous mathematical framework, novel program analyses and digital hardware design to advance current high-level synthesis tools and extend their scope beyond the industrial 'state of the art'. Implementing computation on customised digital hardware plays an increasingly important role in the quest for energy-efficient high-performance computing. Field-programmable gate arrays (FPGAs) gain efficiency by encoding the computing task into the chip's physical circuitry and are gaining rapidly increasing importance in the processor market, especially after recent announcements of large-scale deployments in the data centre. This is driving, more than ever, the demand for higher design entry abstraction levels, such as the automatic circuit synthesis from high-level languages (high-level synthesis). The techniques in this book apply formal reasoning to high-level synthesis in the context of demonstrably practical applications.<

Felix Winterstein received a Master's degree in electrical engineering and information technology from RWTH Aachen University, Germany, in 2009 and received the Ph.D. degree from the Imperial College London in 2016. He is currently a research associate in the Circuits and Systems Group at the same institution. His research area is digital hardware design with an emphasis on customised, reconfigurable computing using FPGAs. His interest focuses on the automatic circuit synthesis from high-level programming languages and advanced compiler techniques to extend the scope of existing design tools in this area.


1. Introduction.- 2. High-level Synthesis of Dynamic Data Structures.- 3. Background.- 4. Heap Partitioning and Parallelisation.- 5. Custom Multi-Cache Architectures.- 6. Conclusion.- Bibliography.- Appendices.

Erscheinungsdatum
Reihe/Serie Springer Theses
Zusatzinfo XIX, 132 p. 19 illus., 7 illus. in color.
Verlagsort Cham
Sprache englisch
Maße 155 x 235 mm
Gewicht 2409 g
Themenwelt Technik Elektrotechnik / Energietechnik
Schlagworte Dynamic Data Structures • FPGA • High-level synthesis • Memory System • separation logic
ISBN-10 3-319-85094-6 / 3319850946
ISBN-13 978-3-319-85094-8 / 9783319850948
Zustand Neuware
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