Symbolic Parallelization of Nested Loop Programs (eBook)

Alexandru-Petru Tanase is a researcher at the Department Of Computer Science, Friedrich Alexander University Erlangen-Nürnberg (FAU), since 2011. He defended his Phd Degree on the topic of “Symbolic Parallelization of Nested Loop Programs” in September, 2017. He received his Diploma Degree in Computer Engineering In 2006 and Master Degree in Parallel Processing in 2008 from ULBS University, Romania. His main research interests include high level synthesis, programmable hardware accelerators, the design of massively parallel architectures, mapping methodologies for domain-specific computing, and architecture/compiler co-design.   Frank Hannig leads the Architecture And Compiler Design Group in the CS Department at the Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany, Since 2004. He received a Diploma Degree in an interdisciplinary course of study in EE and CS from the University of Paderborn, Germany in 2000 and a Ph.D. Degree (Dr.-Ing.) in CS from FAU In 2009. His main research interests are the design of massively parallel architectures, ranging from dedicated hardware to multi-core architectures, mapping methodologies for domain-specific computing, and architecture/compiler co-design. Frank is a Senior Member of the IEEE and an Affiliate Member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).   Jürgen Teich is with Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany, where he is Head of the Chair of Hardware/Software Codesign since 2003. He Received The M.S. Degree (Dipl.- Ing.; with Honors) from the University of Kaiserslautern, Germany, in 1989 and the Ph.D. Degree (Dr.-Ing.; Summa Cum Laude) from the University of Saarland, Saarbruecken, Germany, in 1993. Prof. Teich has organized various ACM/IEEE conferences/symposia as Program Chair, including CODES+ISSS 2007, FPL 2008, ASAP 2010, and DATE 2016. He is the Vice General Chair of DATE 2018 and will be the General Chair of DATE 2019. Moreoever, he serves in the editorial boards of multiple scientific journals, such as ACM TODAES, IEEE Design and Test, IET Cyber-Physical Systems, and JES. He has edited two textbooks on Hardware/Software Codesign and The Handbook of Hardware/Software Codesign (Springer). Since 2010, he has also been the Principal Coordinator of the Transregional Research Center 89 “Invasive Computing” on Multicore Research, funded by the German Research Foundation (DFG). Since 2011, he is a member of Academia Europaea, the Academy of Europe.

Introduction.- Fundamentals and Compiler Framework.- Symbolic Parallelization.- Symbolic Multi‐level Parallelization.- On‐demand Fault‐tolerant Loop Processing.- Conclusions.