CHIPS 2020 VOL. 2 (eBook)

New Vistas in Nanoelectronics

Bernd Höfflinger (Herausgeber)

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2015 | 1st ed. 2016
XXXIII, 319 Seiten
Springer International Publishing (Verlag)
978-3-319-22093-2 (ISBN)

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The release of this second volume of CHIPS 2020 coincides with the 50th anniversary of Moore's Law, a critical year marked by the end of the nanometer roadmap and by a significantly reduced annual rise in chip performance. At the same time, we are witnessing a data explosion in the Internet, which is consuming 40% more electrical power every year, leading to fears of a major blackout of the Internet by 2020.

The messages of the first CHIPS 2020, published in 2012, concerned the realization of quantum steps for improving the energy efficiency of all chip functions. With this second volume, we review these messages and amplify upon the most promising directions: ultra-low-voltage electronics, nanoscale monolithic 3D integration, relevant-data, brain- and human-vision-inspired processing, and energy harvesting for chip autonomy. The team of authors, enlarged by more world leaders in low-power, monolithic 3D, video, and Silicon brains, presents new vistas in nanoelectronics, promising  Moore-like exponential growth sustainable through to the 2030s.

Preface 6
Contents 8
Editor and Contributors 10
Authors’ Biography 13
Acronyms 22
Abstract 31
1 News on Eight Chip Technologies 32
Abstract 32
1.1 Overview 32
1.2 Bipolar-Transistor Technology 34
1.3 CMOS Integrated Circuits 35
1.4 Silicon-on-Insulator (SOI) CMOS Technology 39
1.5 3D CMOS Technologies 40
1.6 Ultra-Low-Voltage Differential Transmission-Gate CMOS Logic 41
1.7 Chip Stacks 47
1.8 Single-Electron-Transistor Technology 47
1.9 Conclusion 48
References 49
2 The Future of Low-Power Electronics 51
Abstract 51
2.1 Electronics Systems and Power-Efficiency 51
2.2 Low-Power CMOS Technology 55
2.2.1 Hybrid SOTB CMOS Technology 55
2.2.2 Low-Voltage SRAM 57
2.2.3 Low-Voltage Microprocessor and Logic Circuits 58
2.3 Low-Power Non-volatile Memories and Switches 61
2.3.1 MRAM for Cache Applications 63
2.3.2 Complementary Atom-Switch for Programmable Logic After Fabrication 65
2.3.3 SOTB-CMOS Microprocessor with Atom-Switch PROM 69
2.3.4 TRAM for Low-Power Storage 71
2.4 3D Integration 73
2.5 The Future of Low-Power Integrated Circuits 76
References 78
3 Monolithic 3D Integration 81
Abstract 81
3.1 Why Monolithic 3D 81
3.1.1 Lithography 83
3.1.2 On-Chip Interconnect 83
3.1.3 Transistor Variation 83
3.2 Historical Review of Monolithic 3D Technologies 86
3.2.1 Thin-Film Polysilicon-Based Monolithic 3D 86
3.2.2 Crystalline Overlay 86
3.2.3 Layer Transfer 87
3.2.4 Transistor Activation 88
3.2.4.1 The RCAT Process 88
3.2.4.2 The Gate Replacement Process 89
3.2.4.3 Laser-Annealing Process 91
3.3 Precision Bonders---A Game Changer for Monolithic 3D 91
3.3.1 Monolithic 3D IC Using Precision Bonders 92
3.3.2 Smart Alignment 93
3.3.3 Strata 2, 3---Examples 94
3.3.4 Monolithic 3D Cost Estimates 95
3.4 EDA for Monolithic 3D 96
3.5 Managing the Heat 98
3.6 3D Memories: 3D NAND,2026 100
3.6.1 Introduction to BiCS 100
3.6.2 3D-NAND 100
3.6.3 Making Contact Without Adding Lithography Steps 102
3.6.4 3D-NOR Flash 103
3.7 Advanced Work---Non-silicon Monolithic 3D 103
3.7.1 III--V Semiconductor 3D Integration 103
3.7.2 Monolithic 3D Integration of Semiconductor, Carbon Nano Tube, STT MRAM and RRAM 105
3.8 The Monolithic 3D Advantages 106
3.8.1 Introduction 106
3.8.2 Reduction in Die Size and Power 106
3.8.2.1 Reduction in Die Size 106
3.8.2.2 Reduction in Power 108
3.8.3 Significant Advantages for Using the Same Fab and Design Tools 108
3.8.3.1 Depreciation 108
3.8.3.2 Learning Curve---Yield 110
3.8.4 Heterogeneous Integration 110
3.8.4.1 Logic, Memory, I/O 110
3.8.4.2 Strata of Logic 112
3.8.4.3 Strata of Different Substrate Crystals and Fabrication Processes 113
3.8.5 Multiple Layers Processed Simultaneously---BiCS 113
3.8.6 Logic Redundancy Allowing 100x Integration with Good Yield 114
3.8.7 3D-FPGA 115
3.8.8 Modular Platform 116
3.8.9 Stacked Layers Are Naturally SOI 117
3.8.10 Local Interconnect Above and Below Transistor Layer 117
3.8.11 Re-buffering Global Interconnect by Upper Strata 117
3.8.12 Other Ideas 118
3.8.12.1 Image Sensor with Pixel Electronics 118
3.8.12.2 Micro-display 119
3.9 Conclusion 120
References 120
4 Analog-Digital Interfaces---Review and Current Trends 122
Abstract 122
4.1 Introduction 122
4.2 General ADC Performance Trends 123
4.3 Trends in Nyquist A/D Converters 128
4.3.1 SAR ADCs 130
4.3.2 Pipelined ADCs 130
4.3.3 Flash ADCs 130
4.3.4 Digitally Assisted Design 131
4.4 Trends in Delta-Sigma A/D Converters 131
4.4.1 Loop Filter 132
4.4.2 Quantizer 135
4.4.2.1 Voltage-Controlled Oscillator-Based Quantizer 135
4.4.2.2 Time-Encoding Quantizer 138
4.4.3 DAC 138
4.4.4 Conclusion on Delta-Sigma A/D Converters 139
4.5 Analog-to-Information Converters 139
4.6 Conclusions 141
References 141
5 Interconnects and Communication 146
Abstract 146
5.1 On-Chip and Chip-Chip Communication 146
5.2 Projections Wireline Communication 147
5.3 Wireless Communication 148
5.4 Optical Communication 150
5.5 Global Mobile Communication 150
5.6 Conclusion 151
References 152
6 Superprocessors 153
Abstract 153
6.1 Evolving Workloads 154
6.2 POWER8---a Big-Data Processor 155
6.3 Security 160
6.4 Optimization Across the Stack 162
6.5 Accelerators 164
6.6 Open Computing 167
6.7 Outlook 168
References 169
7 ITRS 2028---International Roadmap of Semiconductors 171
Abstract 171
7.1 General Observations 171
7.2 ORTC---Overall Roadmap Technology Characteristics 173
7.3 System Drivers 173
7.4 PIDS---Process Integration, Devices and Structures 174
7.5 ERD---Emerging Research Devices 174
7.6 Interconnects 175
7.7 RF-AMS: Radio-Frequency and Analog-Mixed-Signal Technologies 175
7.8 Conclusion 176
References 176
8 Nanolithographies 177
Abstract 177
8.1 The Progression of Optical Lithography 178
8.2 Extreme-Ultraviolet (EUV) Lithography 180
8.3 Multiple-Electron-Beam (MEB) Lithography 182
8.4 Comparison of Three Nanolithographies 187
8.5 2015 Perspective on 7 nm Lithography 190
References 190
9 News on Energy-Efficient Large-Scale Computing 192
Abstract 192
9.1 History and Background 192
9.2 Energy Efficiency 195
9.3 Conclusions 197
References 197
10 High-Performance Computing (HPC) 198
Abstract 198
10.1 Highlights on Standard Processors 198
10.2 Special-Purpose Processors and Energy Efficiency 199
10.3 Supercomputers 201
10.4 Internet Servers 204
10.5 Conclusion 205
References 206
11 Memory 207
Abstract 207
11.1 Static Random-Access Memory (SRAM) 208
11.2 The DRAM (Dynamic Random-Access Memory) at Its Final Stage 209
11.3 Breakthroughs in Non-volatile Memories (NV-RAM's) 210
11.4 Conclusion 212
References 213
12 Intelligent Data Versus Big Data 214
Abstract 214
12.1 Progress in Nano-Chips Fosters Data Explosion 215
12.2 Intelligent Data from and for Our World 217
12.3 Digital Multipliers for Reality Data 223
12.4 Conclusion 224
References 225
13 HDR- and 3D-Vision Sensors 226
Abstract 226
13.1 Scaled CMOS Image Sensors 226
13.2 Hi-Speed Feature-Recognition Chips 227
13.3 High-Dynamic-Range HDR Video Sensors 228
13.4 HDRC Stereo Cameras 230
13.5 3D Time-of-Flight (TOF) Sensors 233
13.6 Conclusion 233
References 233
14 Perception-Inspired High Dynamic Range Video Coding and Compression 235
Abstract 235
14.1 Introduction 235
14.2 HDR Pixel Encoding 236
14.3 High Bit-Depth Compression 238
14.4 Backward-Compatible Compression 239
14.5 Perceptual Depth Compression for Stereoscopic Applications 240
14.6 Conclusion 242
References 243
15 MEMS---Micro-Electromechanical Sensors for the Internet of Everything 245
Abstract 245
15.1 Unique Growth of the MEMS Market 245
15.2 Automotive MEMS Applications and Scaling 247
15.3 Mobile Consumer Electronics 248
15.4 The ``Bosch'' Process 249
15.5 Sensors and Systems-Integration 250
15.6 MEMS-Enabled Systems and Their Consistent Development 251
15.7 Conclusion 253
Disclaimer 253
References 253
16 Networked Neural Systems 254
Abstract 254
16.1 Introduction 254
16.2 Health Monitor 255
16.2.1 PPG (Photo-Plethysmo-Graphical) Analysis 256
16.2.2 The Need for Modelling 257
16.3 Integrated Neural Systems 259
16.3.1 Synaptic Chips 259
16.3.2 Memristor 260
16.4 Distributed Neural Networks 261
16.4.1 Event-Directed Synchronization 261
16.4.2 Self-healing 262
16.5 Conclusion 263
References 264
17 Insertion of Retinal Implants in Worlwide Prostheses 266
Abstract 266
17.1 HDR Subretinal Implant Inspired by the Human Visual System 266
17.2 Chronicle of the Subretinal Implant 267
17.3 CE Certification and Results for Blind Patients Worldwide 268
17.4 Conclusion 270
References 271
18 Brain-Inspired Architectures for Nanoelectronics 272
Abstract 272
18.1 Introduction 273
18.2 Some Features of the Human Brain 274
18.3 Brain Simulation Approaches 278
18.4 Neurocomputers Based on Standard ICs 280
18.5 Neurocomputers Based on Neuro-ASICs 282
18.6 The Blue Brain Project 284
18.7 The SpiNNaker System 284
18.8 The SyNAPSE Program and the IBM TrueNorth Architecture 286
18.9 The BrainScaleS Wafer-Scale Neuromorphic Hardware System 288
18.10 Neurogrid 289
18.11 Comparison 291
18.12 Outlook 293
References 295
19 Energy-Harvesting Applications and Efficient Power Processing 298
Abstract 298
19.1 Systems and Applications 298
19.1.1 Wearable Devices 298
19.1.2 Condition Monitoring 299
19.2 Circuit Components for Energy Harvesting Applications 302
19.2.1 AC Sources 303
19.2.1.1 Wireless Power Transmission Circuits 303
19.2.1.2 Interfaces for Vibration-Based Kinetic Energy Harvesting 305
19.2.2 DC Sources 310
19.2.2.1 Micro Fuel Cells 310
19.2.2.2 Interface Circuits for Thermoelectric Generators 311
19.2.2.3 Interface Circuits for Solar Cells 313
19.2.3 Ultra-Low-Voltage Control Circuits 316
19.2.3.1 Analog 316
19.2.3.2 Digital 317
19.3 Conclusion 318
References 319
20 2020 and Beyond 324
Abstract 324
20.1 Chip Market Forecasts for 2020 324
20.2 The Electric-Power Singularity of 2020 325
20.3 Monolithic and Heterogeneous 3D Integration 326
20.4 Low-Voltage, New Digital Computing 327
20.5 New Video 328
20.6 Reliable Intelligent-Learning Nano-Systems 328
20.7 The Era of Energy-Autonomous Nano-Chip Systems 328
20.8 Another Singularity? 329
References 330
Titles in this Series 332
Index 336

Erscheint lt. Verlag 19.9.2015
Reihe/Serie The Frontiers Collection
The Frontiers Collection
Zusatzinfo XXXIII, 319 p. 217 illus., 90 illus. in color.
Verlagsort Cham
Sprache englisch
Themenwelt Naturwissenschaften Physik / Astronomie Atom- / Kern- / Molekularphysik
Technik Elektrotechnik / Energietechnik
Technik Maschinenbau
Schlagworte 3D Integration of Nanodevices • Analog-digital Converters • Developments in Micro- and Nanoelectronics • Digital Neural Networks • Human-brain Projects • International Technology Roadmap for Semiconductors • Low-Power Electronics • Moore’s Law • Moore’s Law • Nanoelectronic Imagers • Silicon Brains • Vision Chips
ISBN-10 3-319-22093-4 / 3319220934
ISBN-13 978-3-319-22093-2 / 9783319220932
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