Modelling, exploration and optimisation of 3D integrated DRAM and controller

Abstract
The progress in the field of 3D integration of microeletronic systems enables a dependable and cost-effective density increase of ICs in a single package. The possibility to closely integrate heterogeneous ICs with different technologies and functionalities opens a way out of the “Memory/Processor Gap” via integration of scalable 3D stacked DRAMs with very high communication bandwidths and the corresponding logic (e.g. memory controller). In this way 3D integration of standard DRAMs with MPSoCs can largely improve the energy efficiency and increase the memory bandwidth.