Digital Electronics Laboratory Experiments Using the Xilinx XC95108 CPLD with Xilinx Foundation

I. TTL EXPERIMENTS.

Experiment 1. Basic Gates: NOT, AND, NAND, OR, NOR.
Experiment 2. A Gate Circuit Using the 74LS00.
Experiment 3. The Cross-Coupled Latch & Switch De-Bouncing.
II. CPLD EXPERIMENTS.

Experiment 1. AND Gates & OR Gates.
Experiment 2. Inverting Logic: NAND, NOR, & NOT.
Experiment 3. Boolean Laws & Rules and DeMorgan's Theorem.
Experiment 4. XOR & XNOR Gates with Applications.
Experiment 5. Use of XOR/XNOR Gates to Generate & Check Parity.
Experiment 6. Karnaugh Maps.
Experiment 7. Binary Adders.
Experiment 8. Decoders & Applications.
Experiment 9. Encoders & Application to a 7-Segment Display Driver.
Experiment 10: Multiplexers and Demultiplexers.
Experiment 11. Latches: S-R & D-Type.
Experiment 12. Flip-Flops: J-K & D-Type.
Experiment 13. Asynchronous Counters.
Experiment 14. TTL-Equivalent Library Counters.
Experiment 15. Sequential Design in HDL: A Synchronous Counter.
Experiment 16. Shift Registers and Ring Counters.
Experiment 17. Sequential Design in HDL: Registers.
Experiment 18. Timing Circuits: Oscillators & One-Shots.
Experiment 19. Digital to Analog Converter.
Experiment 20. Analog to Digital Converter.
III. APPENDICES.

Appendix A: References.
Appendix B: Glossary.
Appendix C: Tutorial I - Schematic Based Design.
Appendix D: Tutorial II - Using Simulation Tools.
Appendix E: Parallel Port Modes.
Appendix F: Data Sheets.