Digital Communications Test and Measurement
Prentice Hall (Verlag)
978-0-13-335948-0 (ISBN)
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Readers will gain a thorough understanding of the inner workings of digital high-speed systems, and learn how the different aspects of such systems can be tested. The editors and contributors cover key areas in test and measurement of transmitters (digital waveform and jitter analysis and bit error ratio), receivers (sensitivity, jitter tolerance, and PLL/CDR characterization), and high-speed channel characterization (in time and frequency domain). Extensive illustrations are provided throughout.
Coverage includes
Signal integrity from a measurement point of view
Digital waveform analysis using high bandwidth real-time and sampling (equivalent time) oscilloscopes
Bit error ratio measurements for both electrical and optical links
Extensive coverage on the topic of jitter in high-speed networks
State-of-the-art optical sampling techniques for analysis of 100 Gbit/s + signals
Receiver characterization: clock recovery, phase locked loops, jitter tolerance and transfer functions, sensitivity testing, and stressed-waveform receiver testing
Channel and system characterization: TDR/T and frequency domain-based alternatives
Testing and measuring PC architecture communication links: PCIexpress, SATA, and FB DIMM
Dennis Derickson is an assistant professor at California Polytechnic State University. He spent eighteen years as member of technical staff and project manager at Hewlett-Packard and Agilent Technologies before serving as applications engineering manager for Cierra Photonics. He has authored or coauthored fifty publications in high-speed communications and is the editor of Fiber Optic Test and Measurement (Prentice Hall, 1998). Dennis has a Ph.D. from the University of California, Santa Barbara. Marcus Müller is an R&D lead engineer with Agilent Technologies' High-Speed Digital Test segment in Boeblingen, Germany. He specializes in bit error ratio and jitter analysis of high-speed links, and has contributed to new methods for total jitter measurement at low bit error ratios, and jitter tolerance test. Marcus received his M.Sc. degree from Stuttgart University, Germany, in 1999.
Preface xxi About the Authors xxvii Acknowledgments xxxiii Chapter 1 Fundamentals of Digital Communications Systems 1 1.1 Introduction 2
1.2 System Architectures 2
1.3 Line Coding of Digital Signals 12
1.4 Electrical Signaling 23
1.5 Summary 26
1.6 References 26
Chapter 2 Jitter Basics 29 2.1 Definition of Jitter 29
2.2 Jitter as a Statistical Phenomenon34
2.3 Total Jitter and Its Subcomponents 38
2.4 Analytical Solutions for Jitter Mixtures 42
2.5 The Dual Dirac Model 52
2.6 Summary 58
2.7 References 59
Chapter 3 Serial Communication Systems and Modulation Codes 61 3.1 Introduction 62
3.2 Encoders and Modulation Code Examples 68
3.3 Telephone System History and Evolution 89
3.4 SONET Design Requirements 107
3.5 Measuring the Band-Pass Response 112
3.6 Jitter 114
3.7 Measuring Power Supply Noise Immunity 120
3.8 Power Supply Distribution, Grounding, and Shielding 123
3.9 Measuring SONET Jitter 124
3.10 Modulation Codes for the Last Mile 140
3.11 Gigabit Ethernet 149
3.12 Summary 163
3.13 References 164
Chapter 4 Bit Error Ratio Testing 169 4.1 Basics of Bit Error Ratio Testing 170
4.2 Bit Error Ratio Statistics 178
4.3 Advanced BER Measurement Topics 192
4.4 Summary 193
4.5 References 193
Chapter 5 BERT Scan Measurements 195 5.1 Basics of BERT Scan Measurements 195
5.2 Sample Delay Scan 200
5.3 Sample Threshold Scan 226
5.4 Full Eye Scan 228
5.5 Spectral Jitter Decomposition 238
5.6 Summary 241
5.7 References 242
Chapter 6 Waveform Analysis--Real-Time Scopes 243 6.1 Principles of Operation of Real-Time Digital Oscilloscopes 245
6.2 Eye Diagram Analysis on Real-Time Instruments 258
6.3 Methods of Analyzing Individual Jitter Components 279
6.4 Analysis of Composite Jitter 299
6.5 Measurement Procedures 302
6.6 Interpreting Jitter Measurement Results 315
6.7 Summary 325
6.8 References 327
Chapter 7 Characterizing High-Speed Digital Communications Signals and Systems with the Equivalent-Time Sampling Oscilloscope 329 7.1 Sampling Oscilloscope Basics 330
7.2 Triggering the Oscilloscope 330
7.3 Oscilloscope Bandwidth and Sample Rate 331
7.4 Waveform Acquisition Process for the Sampling Oscilloscope 335
7.5 Sources of Instrumentation Noise 346
7.6 Parametric Analysis of Waveforms 350
7.7 The Effect of Oscilloscope Bandwidth on Waveform Results 353
7.8 Measurements of the Eye Diagram 358
7.9 Return-to-Zero Signals 382
7.10 Advanced Jitter Analysis 387
7.11 Summary 417
7.12 References 418
Chapter 8 High-Speed Waveform Analysis Using All-Optical Sampling 421 8.1 Introduction 422
8.2 Principles of Optical Sampling 427
8.3 Performance Measures of All-Optical Sampling Systems 441
8.4 Timebase Designs 464
8.5 Experimental Implementation and Key Building Blocks 475
8.6 Related Applications and Possible Future Directions 492
8.7 Summary 498
8.8 References 499
Chapter 9 Clock Synthesis, Phase Locked Loops, and Clock Recovery 505 9.1 Oscillators and Phase Noise 506
9.2 Phase Locked Loops and Clock Synthesis 510
9.3 Clock Data Recovery Circuits 512
9.4 PLL and Clock Recovery Dynamic Behavior 517
9.5 Measuring PLL Dynamics 523
9.6 Measuring Phase Noise and Jitter Spectrum 525
9.7 Summary 531
9.8 References 532
Chapter 10 Jitter Tolerance Testing 533 10.1 Introduction 533
10.2 Jitter Tolerance: Basic Measurement Method and Test Setup 536
10.3 Generation of Jitter Tolerance Test Signals 539
10.4 Jitter Tolerance Measurement Method and Test Setup 555
10.5 Summary 560
10.6 References 560
Chapter 11 Sensitivity Testing in Optical Digital Communications 563 11.1 Introduction: Optical Digital Receivers 564
11.2 The Basics of Optical Sensitivity Measurements 565
11.3 BER Calculations in Real Communications Systems 588
11.4 Summary 602
11.5 References 603
Chapter 12 Stress Tests in High-Speed Serial Links 605 12.1 The Need for High-Speed Serial Communication 606
12.2 Early High-Speed Optical Stressed-Eye Tests 607
12.3 BER versus OSNR 609
12.4 10 Gigabit Ethernet: IEEE 802.3ae 618
12.5 The Advent of Electronic Dispersion Compensation 629
12.6 LRM Stress Testing (IEEE 802.3aq) 634
12.7 Future Standards 641
12.8 Summary 654
12.9 References 655
Chapter 13 Measurements on Interconnects 657 13.1 Measurements and Characterization of Interconnects 658
13.2 Modeling of System Performance from Measurements 689
13.3 Summary 709
13.4 References 710
Chapter 14 Frequency Domain Measurements 713 14.1 Introduction 714
14.2 Understanding Network Analyzer Hardware 716
14.3 Understanding S-Parameters 729
14.4 Error Correction and Calibration Methods 740
14.5 Graphical Representations 749
14.6 Example Devices 758
14.7 Summary 783
14.8 References 783
Chapter 15 Jitter and Signaling Testing for Chip-to-Chip Link Components and Systems 785 15.1 Introduction 785
15.2 Multiple Gigabit per Second Computer Chip-to-Chip I/O Link Architectures 788
15.3 Chip-to-Chip Link System BER and Signaling Tests 800
15.4 Testing Examples 811
15.5 Future Technology Trends for High-Speed Links 815
15.6 Summary 817
15.7 References 817
Appendix A Pseudo-Random Binary Sequences 819 Appendix B Passive Elements for Test Setups 835 Appendix C Coaxial Cables and Connectors 847 Appendix D Supplemental Materials for Chapter 3 861 Index 911
Erscheint lt. Verlag | 8.11.2012 |
---|---|
Verlagsort | Upper Saddle River |
Sprache | englisch |
Maße | 178 x 235 mm |
Gewicht | 1470 g |
Themenwelt | Technik ► Elektrotechnik / Energietechnik |
Technik ► Nachrichtentechnik | |
ISBN-10 | 0-13-335948-4 / 0133359484 |
ISBN-13 | 978-0-13-335948-0 / 9780133359480 |
Zustand | Neuware |
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