Computer Organization and Design (eBook)

Front Cover 1
Computer Organization and Design 6
Copyright Page 7
Table of Contents 10
Preface 16
Chapter 1. Computer Abstractions and Technology 27
1.1 Introduction 28
1.2 Below Your Program 35
1.3 Under the Covers 38
1.4 Performance 51
1.5 The Power Wall 64
1.6 The Sea Change: The Switch from Uniprocessors to Multiprocessors 66
1.7 Real Stuff: Manufacturing and Benchmarking the AMD Opteron X4 69
1.8 Fallacies and Pitfalls 76
1.9 Concluding Remarks 79
1.10 Historical Perspective and Further Reading 80
1.11 Exercises 81
Chapter 2. Instructions: Language of the Computer 99
2.1 Introduction 101
2.2 Operations of the Computer Hardware 102
2.3 Operands of the Computer Hardware 105
2.4 Signed and Unsigned Numbers 112
2.5 Representing Instructions in the Computer 119
2.6 Logical Operations 127
2.7 Instructions for Making Decisions 130
2.8 Supporting Procedures in Computer Hardware 137
2.9 Communicating with People 147
2.10 MIPS Addressing for 32-Bit Immediates and Addresses 153
2.11 Parallelism and Instructions: Synchronization 162
2.12 Translating and Starting a Program 164
2.13 A C Sort Example to Put It All Together 174
2.14 Arrays versus Pointers 182
2.15 Advanced Material: Compiling C and Interpreting Java 186
2.16 Real Stuff: ARM Instructions 186
2.17 Real Stuff: x86 Instructions 190
2.18 Fallacies and Pitfalls 199
2.19 Concluding Remarks 201
2.20 Historical Perspective and Further Reading 204
2.21 Exercises 204
Chapter 3. Arithmetic for Computers 247
3.1 Introduction 249
3.2 Addition and Subtraction 249
3.3 Multiplication 255
3.4 Division 261
3.5 Floating Point 267
3.6 Parallelism and Computer Arithmetic: Associativity 295
3.7 Real Stuff: Floating Point in the x86 297
3.8 Fallacies and Pitfalls 300
3.9 Concluding Remarks 305
3.10 Historical Perspective and Further Reading 308
3.11 Exercises 308
Chapter 4. The Processor 323
4.1 Introduction 325
4.2 Logic Design Conventions 328
4.3 Building a Datapath 332
4.4 A Simple Implementation Scheme 341
4.5 An Overview of Pipelining 355
4.6 Pipelined Datapath and Control 369
4.7 Data Hazards: Forwarding versus Stalling 388
4.8 Control Hazards 400
4.9 Exceptions 409
4.10 Parallelism and Advanced Instruction-Level Parallelism 416
4.11 Real Stuff: the AMD Opteron X4 (Barcelona) Pipeline 429
4.12 Advanced Topic: an Introduction to Digital Design Using a Hardware Design Language to Describe and Model a Pipeline and More Pipelining Illustrations 431
4.13 Fallacies and Pitfalls 432
4.14 Concluding Remarks 433
4.15 Historical Perspective and Further Reading 434
4.16 Exercises 434
Chapter 5. Large and Fast: Exploiting Memory Hierarchy 475
5.1 Introduction 477
5.2 The Basics of Caches 482
5.3 Measuring and Improving Cache Performance 500
5.4 Virtual Memory 517
5.5 A Common Framework for Memory Hierarchies 543
5.6 Virtual Machines 550
5.7 Using a Finite-State Machine to Control a Simple Cache 554
5.8 Parallelism and Memory Hierarchies: Cache Coherence 559
5.9 Advanced Material: Implementing Cache Controllers 563
5.10 Real Stuff: the AMD Opteron X4 (Barcelona) and Intel Nehalem Memory Hierarchies 564
5.11 Fallacies and Pitfalls 568
5.12 Concluding Remarks 572
5.13 Historical Perspective and Further Reading 573
5.14 Exercises 573
Chapter 6. Storage and Other I/O Topics 593
6.1 Introduction 595
6.2 Dependability, Reliability, and Availability 598
6.3 Disk Storage 600
6.4 Flash Storage 605
6.5 Connecting Processors, Memory, and I/O Devices 607
6.6 Interfacing I/O Devices to the Processor, Memory, and Operating System 611
6.7 I/O Performance Measures: Examples from Disk and File Systems 621
6.8 Designing an I/O System 623
6.9 Parallelism and I/O: Redundant Arrays of Inexpensive Disks 624
6.10 Real Stuff: Sun Fire x4150 Server 631
6.11 Advanced Topics: Networks 637
6.12 Fallacies and Pitfalls 638
6.13 Concluding Remarks 642
6.14 Historical Perspective and Further Reading 643
6.15 Exercises 644
Chapter 7. Multicores, Multiprocessors, and Clusters 655
7.1 Introduction 657
7.2 The Difficulty of Creating Parallel Processing Programs 659
7.3 Shared Memory Multiprocessors 663
7.4 Clusters and Other Message-Passing Multiprocessors 666
7.5 Hardware Multithreading 670
7.6 SISD, MIMD, SIMD, SPMD, and Vector 673
7.7 Introduction to Graphics Processing Units 679
7.8 Introduction to Multiprocessor Network Topologies 685
7.9 Multiprocessor Benchmarks 689
7.10 Roofline: A Simple Performance Model 692
7.11 Real Stuff: Benchmarking Four Multicores Using the Roofline Model 700
7.12 Fallacies and Pitfalls 709
7.13 Concluding Remarks 711
7.14 Historical Perspective and Further Reading 713
7.15 Exercises 713
Appendix A. Graphics and Computing GPUs 729
A.1 Introduction 730
A.2 GPU System Architectures 734
A.3 Programming GPUs 739
A.4 Multithreaded Multiprocessor Architecture 752
A.5 Parallel Memory System 763
A.6 Floating-point Arithmetic 768
A.7 Real Stuff: The NVIDIA GeForce 8800 773
A.8 Real Stuff: Mapping Applications to GPUs 782
A.9 Fallacies and Pitfalls 799
A.10 Concluding Remarks 803
A.11 Historical Perspective and Further Reading 804
Appendix B. Assemblers, Linkers, and the SPIM Simulator 805
B.1 Introduction 806
B.2 Assemblers 813
B.3 Linkers 821
B.4 Loading 822
B.5 Memory Usage 823
B.6 Procedure Call Convention 825
B.7 Exceptions and Interrupts 836
B.8 Input and Output 841
B.9 SPIM 843
B.10 MIPS R2000 Assembly Language 848
B.11 Concluding Remarks 884
B.12 Exercises 885
Index 888