Fine- and Coarse-Grain Reconfigurable Computing (eBook)
XVI, 381 Seiten
Springer Netherland (Verlag)
978-1-4020-6505-7 (ISBN)
The basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures are discussed in this book. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described.
S. Vassiliadis, Professor at Department of Computer Engineering at the TU Delft in The Netherlands is well known in the Reconfigurable Computing community.
D. Soudris, Professor at Department of Electrical and Computer Engineering at the Democritus University of Thrace in Greece is a successful Kluwer author
Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES and DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors.
S. Vassiliadis, Professor at Department of Computer Engineering at the TU Delft in The Netherlands is well known in the Reconfigurable Computing community.D. Soudris, Professor at Department of Electrical and Computer Engineering at the Democritus University of Thrace in Greece is a successful Kluwer author
Introduction.
Part I
Chapter 1: A Survey of Fine-Grain Reconfigurable Architectures and CAD tools; K. Tatas, K. Siozios and D. Soudris
Chapter 2: A Survey of Coarse-Grain Reconfigurable Architectures and CAD tools; G. Theodoridis, Stamatis Vassiliadis and D. Soudris
Part II: Case Studies
Chapter 3: AMDREL: A Novel Low-Energy FPGA Architecture and Supporting CAD Tool Design Flow; D. Soudris, K. Tatas, K. Siozios, G. Koutroumpezis, S. Nikolaidis, S. Siskos, N. Vassiliadis, V. Kalenteridis, H. Pournara and I. Pappas
Chapter 4: A coarse-grain dynamically reconfigurable system and compilation framework; Marcos Sanchez-Elez, Milagros Fernandez, Nader Bagherzadeh, Roman Hermida, Fadi Kurdahi and Rafael Maestre
Chapter 5: Polymorphic Instruction Set Computers; Georgi Kuzmanov and Stamatis Vassiliadis
Chapter 6: ADRES&DRESC: Architecture And Compiler For Coarse-Grain Reconfigurable Processors; B. Mei, M. Berekovic, J-Y. Mignolet
Chapter 7: A Taxonomy of Field-Programmable Custom Computing Machines: An architectural approach; Mihai SIMA, Stamatis Vassiliadis and Sorin Cotofana
Erscheint lt. Verlag | 24.9.2007 |
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Vorwort | Y. Patt, J. Smith, M. Valero |
Zusatzinfo | XVI, 381 p. |
Verlagsort | Dordrecht |
Sprache | englisch |
Themenwelt | Mathematik / Informatik ► Informatik ► Netzwerke |
Mathematik / Informatik ► Informatik ► Software Entwicklung | |
Informatik ► Weitere Themen ► CAD-Programme | |
Informatik ► Weitere Themen ► Hardware | |
Technik ► Elektrotechnik / Energietechnik | |
Schlagworte | Architecture • CAD Design Flow • classification • Coarse-Grain Architecture • Compiler • Computer • Computer Science • Configuration • Design • field programmable gate array • FPGA • Hardware • Integrated circuit • Interconnect • Logic • Reconfigurable Architecture • Software |
ISBN-10 | 1-4020-6505-1 / 1402065051 |
ISBN-13 | 978-1-4020-6505-7 / 9781402065057 |
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