Application-Specific Mesh-based Heterogeneous FPGA Architectures (eBook)

Foreword 6
Preface 8
1 Abstract 8
2 Dedication 9
3 Acknowledgments 9
Contents 10
List of Figures 14
List of Tables 18
Introduction 20
1.1 Background 20
1.2 Motivation and contribution 23
1.3 Field of Applications 26
1.4 Book Organization 26
State of the art 28
2.1 Introduction to FPGAs 28
2.2 Research trends in FPGAs 36
2.3 Conclusion 48
Heterogeneous FPGA Exploration Environment 50
3.1 Introduction and PreviousWork 50
3.2 Architecture Exploration Environment 51
3.3 Architecture Description Mechanism 53
3.4 Software Flow 55
3.5 Floor-planning Techniques 64
3.6 Area Model 67
3.7 Experimentation and Analysis 67
3.8 Conclusion 79
FPGA Layout Generation 80
4.1 Introduction and Previous work 80
4.2 FPGA Generation 81
4.3 Architecture Features 88
4.4 Validation 90
4.5 Tapeout 93
4.6 Conclusion and FutureWork 93
ASIF: Application Specific Inflexible FPGA 95
5.1 Introduction and PreviousWork 95
5.2 Reference FPGA architecture 97
5.3 ASIF Generation Techniques 98
5.4 ASIF Exploration Environment 105
5.5 Area Model 106
5.6 Experimentation and Analysis 108
5.7 Quality Analysis 113
5.8 Conclusion 118
ASIF using Heterogeneous Logic Blocks 120
6.1 ASIF Generation Technique 121
6.2 Experimentation and Analysis 122
6.3 Mapping application circuits on ASIF 129
6.4 Conclusion and FutureWork 134
ASIF Hardware Generation 135
7.1 Introduction and PreviousWork 135
7.2 ASIF Generation 138
7.3 Validation 147
7.4 ASIF Layout Generation 148
7.5 Experiments and Analysis 149
7.6 Conclusion and FutureWork 151
Conclusion and Future Lines of Research 154
8.1 Summary of contributions 154
8.2 Future work 157
Bibliography 160