Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications (eBook)
VII, 220 Seiten
Springer New York (Verlag)
978-1-4419-7595-9 (ISBN)
Embedded systems applications that are either mission or safety-critical usually entail low- to mid- production volumes, require the rapid development of specific tasks, which are typically computing intensive, and are cost bounded. The adoption of re-configurable FPGAs in such application domains is constrained to the availability of suitable techniques to guarantee the dependability requirements entailed by critical applications. This book describes the challenges faced by designers when implementing a mission- or safety-critical application using re-configurable FPGAs and it details various techniques to overcome these challenges. In addition to an overview of the key concepts of re-configurable FPGAs, it provides a theoretical description of the failure modes that can cause incorrect operation of re-configurable FPGA-based electronic systems. It also outlines analysis techniques that can be used to forecast such failures and covers the theory behind solutions to mitigate fault effects. This book also reviews current technologies available for building re-configurable FPGAs, specifically SRAM-based technology and Flash-based technology. For each technology introduced, theoretical concepts presented are applied to real cases. Design techniques and tools are presented to develop critical applications using commercial, off-the-shelf devices, such as Xilinx Virtex FPGAs, and Actel ProASIC FPGAs. Alternative techniques based on radiation hardened FPGAs, such as Xilinx SIRF and Atmel ATF280 are also presented. This publication is an invaluable reference for anyone interested in understanding the technologies of re-configurable FPGAs, as well as designers developing critical applications based on these technologies.
Contents 5
1 Introduction 8
References 11
Part I Basic Concepts 12
2 Reconfigurable Field Programmable Gate Arrays: Basic Concepts 13
2.1 FPGA Architectures 13
2.2 FPGA Configuration Technology 18
2.2.1 Floating Gate Technology 18
2.2.2 Antifuse Technology 19
2.2.3 SRAM Technology 19
2.3 The Logic Block 20
2.3.1 Fine-Grain Logic Blocks 20
2.3.2 Coarse-Grain Logic Blocks 21
2.4 The Routing Architecture 23
2.4.1 The Switching Elements 24
2.5 The Input/Output Blocks 27
2.6 The Configuration Memory 27
2.7 An Overview of the Architecture of Modern FPGAs 29
2.7.1 Logic Resources 30
2.7.2 Interconnection Resources 33
2.7.3 Memory Resources 36
2.7.4 Arithmetic Resources 37
2.7.5 Processing Resources 37
2.7.6 Interfacing Resources 40
References 40
3 Reconfigurable Field Programmable Gate Arrays: Failure Modes and Analysis 42
3.1 The Impact of the Environment on the Device 42
3.1.1 Radiation Environments 43
3.1.2 Radiation Characteristics 45
3.1.3 Physical Effects 46
3.1.4 From the Effect to the Fault 49
3.1.5 Fault Models in FPGAs 55
3.1.6 SEUs and MCUs Effects on the FPGA's Routing Resources 57
3.1.7 SEUs and MCUs Effects on the FPGA's Logic Resources 62
3.1.8 Topological Modifications Induced by SEUs and MCUs 63
3.2 Analysis Techniques 67
3.2.1 Life Testing 69
3.2.2 Accelerated Radiation Testing 71
3.2.3 Fault Injection 73
3.2.4 Analytical Techniques 79
References 87
4 Reconfigurable Field Programmable Gate Arrays: Hardening Solutions 89
4.1 Overview on the Design Process for FPGA Applications 89
4.1.1 FPGA Design 91
4.1.2 Application Design 92
4.2 Techniques for FPGA Manufacturer 100
4.2.1 Mitigation Techniques for SEL 101
4.2.2 Mitigation Techniques for TID 108
4.2.3 Mitigation Techniques for Single Memory Elements 110
4.2.4 Mitigation Techniques for Programming Elements 117
4.2.5 Mitigation Techniques for Memories 124
4.2.6 Mitigation Techniques for Logic Elements 126
4.2.7 Mitigation Techniques for Input/Output Elements 128
4.3 Overview of Techniques for FPGA User 130
4.3.1 In-Chip Mitigation Techniques 130
4.3.2 Off-Chip Mitigation Techniques 171
References 172
Part II Practical Concepts 180
5 Reprogrammable FPGAs for Mission-Critical Applications 181
5.1 Introduction 181
5.2 Radiation-Tolerant Reprogrammable FPGAs 182
5.2.1 Virtex-4 QV Products 182
5.2.2 Actel RT ProASIC3 184
5.3 Radiation-Hardened Re-programmable FPGAs 186
5.3.1 Atmel ATF280 186
References 188
6 Putting Mitigation Techniques at Work 189
6.1 Mitigation Techniques for SRAM-Based Devices: The Xilinx Virtex Case Study 189
6.1.1 Single Event Upsets Consideration 189
6.1.2 Multiple Cell Upsets Considerations 194
6.2 Mitigation Techniques for Flash-Based Devices: The Actel ProASIC3 Case Study 200
6.2.1 Single Event Transient Characterization 200
6.2.2 Single Event Transient Mitigation 203
References 206
7 System-Level Considerations 207
7.1 Introduction 207
7.2 The Target Radioactive Environment 208
7.3 The Impact of the Target Radioactive Environment 210
7.4 The Impact of the Target Application 211
7.5 System-Level Considerations 213
References 214
8 Conclusions 215
Subject Index 218
| Erscheint lt. Verlag | 9.11.2010 |
|---|---|
| Zusatzinfo | VII, 220 p. |
| Verlagsort | New York |
| Sprache | englisch |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| Schlagworte | Actel • Atmel • CMOS integrated circuits • Fault Tolerant Computing • Fault Tolerant FPGAs • field programmable gate array • Flash based FPGAs • FPGA • Mission Critical Embedded Systems • Radiation hardened FPGAs • Re-configurable computing • Safety Critical Embedded Systems • SRAM based F • SRAM based FPGAs • Xilinx |
| ISBN-10 | 1-4419-7595-0 / 1441975950 |
| ISBN-13 | 978-1-4419-7595-9 / 9781441975959 |
| Haben Sie eine Frage zum Produkt? |
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