An Improved Markov Random Field Design Approach For Digital Circuits
Introducing Fault-Tolerance With Higher Noise-Immunity For The Nano-Circuits As Compared To CMOS And MRF Designs
Seiten
2011
LAP Lambert Acad. Publ. (Verlag)
978-3-8443-3263-6 (ISBN)
LAP Lambert Acad. Publ. (Verlag)
978-3-8443-3263-6 (ISBN)
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As the MOSFET dimensions scale down to nanoscale level, the reliability of circuits based on these devices decreases. Therefore, a mechanism has to be devised that can make the nanoscale systems perform reliably using unreliable circuit components. The solution is fault-tolerant circuit design. Markov Random Field (MRF) is an effective approach that achieves fault-tolerance in integrated circuit design. The previous research on this technique suffers from limitations at the design, simulation and implementation levels. As improvements, the MRF fault-tolerance rules have been validated for a practical circuit example. The simulation framework is extended from thermal to a combination of thermal and random telegraph signal noise sources to provide a more rigorous noise environment for the simulation of nanoscale circuits. Moreover, an architecture-level improvement has been proposed in the design of previous MRF gates. The re-designed MRF is termed as Improved-MRF. By simulating various test circuits in Cadence, it is found that Improved-MRF circuits are 400 whereas MRF circuits are only 10 times more noise-tolerant than the CMOS alternatives.
Sprache | englisch |
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Maße | 150 x 220 mm |
Gewicht | 147 g |
Themenwelt | Technik ► Elektrotechnik / Energietechnik |
ISBN-10 | 3-8443-3263-4 / 3844332634 |
ISBN-13 | 978-3-8443-3263-6 / 9783844332636 |
Zustand | Neuware |
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