Embedded Systems and Computer Architecture (eBook)

Front Cover 1
Embedded Systems and Computer Architecture 4
Copyright Page 5
Contents 6
Preface 12
Notation used in the text 14
Part 1: The Building Blocks 16
Chapter 1. Binary numbers 18
1.1 Numbers within a computing machine 18
1.2 Adding binary integers 20
1.3 Representing signed integers 20
1.4 Addition and subtraction of signed integers 21
1.5 Two's complement theory* 22
1.6 Use of hexadecimal representation 23
1.7 Problems 24
Chapter 2. Logic expressions 27
2.1 Logic – the bank vault 27
2.2 Evaluating the logic expression for the bank vault 28
2.3 Another solution 30
2.4 Simplifying logical expressions* 31
2.5 Rules for simplifying logical expressions using a map* 34
2.6 Karnaugh–Veitch program, KVMap* 38
2.7 Quine–McCluskey method* 40
2.8 Problems 45
Chapter 3. Electronic logic circuits 48
3.1 Electronic controller 48
3.2 Development of the bank vault controller design 48
3.3 Gates – electronic circuits that perform logical operations 49
3.4 Decoder circuit 51
3.5 Multiplexer circuit 52
3.6 Flip-flops 54
3.7 Storage registers 56
3.8 State machines* 56
3.9 Programmable logic devices* 62
3.10 Problems 63
Chapter 4. Computer arithmetic 67
4.1 Circuit to add numbers 67
4.2 Adder/Subtractor 68
4.3 Arithmetic and logic unit 69
4.4 Shifting data 71
4.4 Fast adders* 73
4.5 Floating-point numbers* 75
4.6 Problems 82
Part 2: Computing Machines 84
Chapter 5. Computer design 86
5.1 A manual computing system 86
5.2 Storing data and program instructions 87
5.3 Connecting the machine components 89
5.4 Architecture of Simple Machine 90
5.5 More general view of the design of Simple Machine* 92
5.6 Improvements to Simple Machine 96
5.7 Architecture of the G80 microprocessor 99
5.8 Problems 100
Chapter 6. Instruction set and code assembly 101
6.1 Programmer's model 101
6.2 Instruction format and addressing modes 102
6.3 Converting the source code to machine code – manual assembly 104
6.4 Using the assembler 105
6.5 Assembly language 106
6.6 Types of instruction 107
6.7 Problems 112
Chapter 7. Program structures 115
7.1 Program control structures 115
7.2 Data structures 120
7.3 Subroutines 132
7.4 Problems 137
Chapter 8. Simple computer circuits 140
8.1 G80 external connections 140
8.2 Read Only Memory Device – ROM 140
8.3 COMP1 computer – G80 with ROM only 142
8.4 RAM device 145
8.5 COMP2 computer – G80 with ROM and RAM 146
8.6 COMP3 computer 149
8.7 Microprocessor control signals 151
8.8 Problems 152
Chapter 9. Input and output ports 153
9.1 Simple output port 153
9.2 Port address space 155
9.3 A simple input port 157
9.4 Programmable ports* 157
9.5 Serial data transmission - UART* 160
9.6 Problems 162
Chapter 10. Input and output methods 163
10.1 Simple input and output 163
10.2 Handshaking 163
10.3 Simple output to a slow device 166
10.4 Do-forever loop 167
10.5 Processor interrupt 168
10.6 Possible interrupt mechanisms 169
10.7 Interrupt priority mechanisms 172
10.8 Non-maskable interrupt 174
10.9 G80 interrupt mechanisms 174
10.10 Direct memory access 182
10.11 Problems 184
Chapter 11. More devices 187
11.1 Counter device and its use in a conveyor belt 187
11.2 Timer device 188
11.3 Calendar device 192
11.4 Pottery kiln 192
11.5 Multitasking* 193
11.6 Problems 198
Chapter 12. Assembler and linker tools 200
12.1 How an assembler works 200
12.2 Linker 206
12.3 Intel format file 209
12.4 High-level languages 210
12.5 Problems 210
Chapter 13. The control unit 211
13.1 Requirements of the control unit 211
13.2 Register transfers 211
13.3 Instruction fetch 213
13.4 Examples of instruction execution 214
13.5 Hardwired controller 219
13.6 More about the hardwired controller 220
13.7 Microprogrammed control 221
13.8 Problems 226
Part 3: Larger Computers 228
Chapter 14. Larger computers 230
14.1 General-purpose computers 230
14.2 Memory bottleneck 231
14.3 Storage within a computer 231
14.4 Data bus width and memory address space 232
14.5 Addressing modes 232
14.6 Organization of 32-bit memory 233
14.7 Instruction queue 236
14.8 Locality of reference 237
14.9 Operating systems 237
Chapter 15. Cache memory 240
15.1 Basic operation of cache 240
15.2 Cache organization – direct mapping 242
15.3 Cache organization – set-associative mapping 245
15.4 Cache organization – fully associative mapping 247
15.5 Problems 249
Chapter 16. Memory management 250
16.1 Virtual and physical addresses - imaginary and real memory 250
16.2 Pages and page frames 251
16.3 Page Tables 251
16.4 Handling a page fault 253
16.5 Page size 256
16.6 Two-level paging* 256
16.7 Translation look-aside buffer 258
16.8 Memory protection 258
16.9 Problems 259
Appendix A: G80 instruction set 260
Appendix B: ASCII character codes 276
Appendix C: Specifications of the input and output devices 277
Appendix D: The GDS assembler and linker 299
Index 306