High-Speed 1.55-μm VCSEL Arrays for Heterogeneous Integration on Silicon-On-Insulator

This work aims to enhance the modulation bandwidth of InP VCSELs by using three different approaches such as the reduction of the cavity length, a novel double-mesa design and a high-strained low-detuned active region. By reducing the semiconductor cavity length by almost a factor two compared to state-of-the-art InP VCSELs, small-signal bandwidths in excess of 21 GHz are achieved by directly modulating the device. This is, to the best of our knowledge, the highest bandwidth demonstrated for VCSELs emitting at long wavelengths and led to the first demonstration of a 50 Gb/s link by using non-return-to-zero modulation in back-to-back configuration and without any equalization. By implementing a novel double-mesa design, the parasitic limitations are overcome thanks to the reduction of mesa capacitance by almost a factor two. Finally, a high-strained and low-detuned active region with 1.7-% compressively strained AlGaInAs quantum wells and 25-nm gain-cavity detuning is designed with the aim of increasing the differential gain of the laser. This active region is embedded in a VCSEL structure leading to a maximum small-signal bandwidth of 19.5 GHz. Even though this result is inferior to the one achieved by reducing the cavity length, this small-signal bandwidth is, to the best of our knowledge, the highest demonstrated for a 1.55 μm VCSEL with comparable cavity length. In order to show the potential of the fabricated VCSELs in system-level applications, advance modulation formats such as discrete-multi-tone modulation are investigated leading to the demonstration of the highest net bit rate (107 Gb/s) ever generated with long-wavelength VCSELs. In parallel to the enhancement of the modulation bandwidth, a systematic experimental analysis of the stationary and dynamic performance of 1.5-μm VCSELs is done with respect to the cavity length, compressive strain, number of quantum wells and mesa capacitance. Based on these results, the theoretical combination of the three approaches presented in this work is calculated and it leads to a theoretical bandwidth of 26 GHz. This value is only 15% lower than the highest bandwidth ever demonstrated with directly-modulated GaAs VCSELs.
Thanks to the low losses in silicon waveguides and the possibility to be fabricated into monolithic arrays, InP-based VCSELs are the candidate of choice for the integration into photonic integrated circuits based on the silicon-on-insulator (SOI) technology. With device data rates limited to a few tens of gigabits, such circuit offers the great advantage of aggregating the bandwidth of several VCSELs. In the framework of an industry-driven collaborative project called MIRAGE, this work aims to support the demonstration of the first terabit active optical cable based on a 3D electronic-photonic integrated circuit and VCSEL-based electro-optical conversion. To allow heterogeneous integration into a SOI platform, monolithic VCSEL arrays with high modulation bandwidth, multi-wavelength emission, single-mode operation and well-defined polarization orientation are designed, fabricated and characterized in this work. Even though multi-wavelength arrays with well-defined polarization have been first demonstrated before this work, these technology developments are adapted to meet the needs of the MIRAGE project and the fabrication process is developed with view to volume-manufacturability (i.e. without using electron beam lithography). Making use of the MIRAGE SOI platform, the feasibility of CXP modules with capacity of 672 Gb/s has been demonstrated. This capacity is more than six times larger than the best commercially available active optical cables to date.