Silicon Photonics III (eBook)

David J. Lockwood earned BSc (1964), MSc (1966), and PhD (1969) degrees in physics at the University of Canterbury and was awarded a DSc in 2000. His doctoral research work was on inelastic light (Raman) scattering from insulators under Professor Alister G. McLellan. He spent 1970-71 as a post-doctoral fellow in physical chemistry with Professor Donald E. Irish at the University of Waterloo working on the vibrational spectroscopy of solvated cations. Dr. Lockwood then moved to Edinburgh University as a research fellow in the group of Professor William Cochran and spent six years there researching the dynamical properties of structural phase transitions and antiferromagnets. As a result of these studies he was awarded a DSc (1978) degree in physics by Edinburgh University. In 1978, Dr. Lockwood joined the Division of Physics of the National Research Council (NRC) of Canada, where he is now a Principal Research Officer in the Institute for Microstructural Sciences. At NRC, Dr. Lockwood continued his investigations of the electronic and magnetic excitations of antiferromagnets culminating in the classic book on light scattering in magnetic solids co-authored with Professor Michael G. Cottam. Since the mid-1980s he has researched the optical properties of semiconductor heterostructures, superlattices, and more recently, nanostructures. His seminal work on silicon nanostructures resulted in the definitive and widely cited observation of quantum-confined light emission in silicon and also of self-organized growth in superlattice structures. Dr. Lockwood has now published over 550 papers and 22 books on these topics and holds 7 patents. Dr. Lockwood has been extremely active in the promotion of science internationally through his service in recent years on more than 40 international and national committees including work within NATO, IUPAP, and the American Physical Society, where he was chair of the Forum on International Physics. He is an Editor of Solid State Communications and a member of the Editorial Boards of Physica E, Low Temperature Physics, The Open Condensed Matter Physics Journal, and Physics in Canada and is also Founding Editor for the Book Series on Nanostructure Science and Technology. Within the Electrochemical Society (ECS), he has co-organized or chaired a number of very successful international symposia on pits and pores, quantum confinement, and advanced luminescent materials and has served on the Board of Directors of ECS as well as chair of the Luminescence and Display Materials Division. He has served on the executive of the Canadian Association of Physicists as director of international affairs and also as treasurer, and of the Royal Society of Canada as treasurer. Dr. Lockwood is a Fellow of the Royal Society of Canada, the American Physical Society, and the Electrochemical Society, and is a member of the Materials Research Society, ASTM International, the Institute of Nanotechnology, and the Canadian Association of Physicists. In 2005 he was awarded the Brockhouse Medal of the Canadian Association of Physicists for outstanding achievement in condensed matter and materials physics and the Tory Medal of the Royal Society of Canada for outstanding research in any branch of astronomy, chemistry, mathematics, physics, or an allied science. Lorenzo Pavesi is Professor of Experimental Physics at the University of Trento (Italy). Born the 21st of November 1961, he received his PhD in Physics in 1990 at the Ecole Polytechnique Federale of Lausanne (Switzerland). In 1990 he became Assistant Professor, an Associate Professor in 1999 and Full Professor in 2002 at the University of Trento. He leads the nanoscience laboratory (25 people), teaches several classes at the Science Faculty of the University of Trento, and is dean of the PhD School in Physics. He founded the research activity in semiconductor optoelectronics at the University of Trento and started several laboratories of photonics, growth and advanced treatment of materials. He is in charge of the professional master in NEMS-MEMS, coorganized between University and FBK. He has directed more than 15 PhD students and more than 20 Master thesis students. His research activity concerned the optical properties of semiconductors. During the last years, he concentrated on Silicon based photonics where he looks for the convergence between photonics and electronics by using silicon nanostructures. He is interested in active photonics devices which can be integrated in silicon by using classical waveguides or novel waveguides such as those based on dynamical photonic crystals. His interests encompass also optical sensors or biosensors and solar cells. In silicon photonics, he is one of the worldwide recognized experts, he organized several international conferences, workshops and schools and is a frequently invited speaker. He manages several research projects, both national and international. He advises EC on photonics and is a frequently invited reviewer, monitor or referee for photonics projects by several grant agencies. He is an author or co-author of more than 250 papers, author of several reviews, editor of more than 10 books, author of 2 books and holds six patents. He is in the editorial board of Research Letters in Physics and he was in the editorial board of Journal of Nanoscience and Nanotechnologies, in the directive council of the LENS (Florence), in the Board of Delegates of E-MRS. He holds an H-number of 33 according to the web of science

Preface 6
Contents 9
Contributors 19
1 Silicon Optical Interposers for High-Density Optical Interconnects 24
Abstract 24
1.1 Introduction 24
1.1.1 Trends and Requirements of Computing Systems in Data Centers 24
1.1.2 Problems with Electrical Interconnects 25
1.1.3 Optical Interconnects with Silicon Photonics 26
1.1.4 Vision for on-Chip Servers 26
1.1.5 Photonics-Electronics Convergence System Technology (PECST) Project 27
1.2 Photonics--Electronics Convergence System for Inter-chip Interconnects 27
1.2.1 Optical Interconnects for Short Reach 27
1.2.2 Integration Between Photonics and Electronics 28
1.2.3 Light Source Integration 29
1.2.4 Photonics--Electronics Convergence System with Silicon Optical Interposers 31
1.3 Configuration and Characteristics of Optical Components for Silicon Optical Interposers 32
1.3.1 Silicon Optical Waveguides 32
1.3.2 Hybridly Integrated On-Chip Light Sources 33
1.3.2.1 Arrayed Laser Diodes 33
1.3.2.2 Spot-Size Converters 34
1.3.2.3 Flip-Chip Bonding of Arrayed LD Chip 35
1.3.3 Silicon Optical Modulators 37
1.3.4 Germanium Photodetectors 38
1.4 Silicon Optical Interposers for High Bandwidth Density 39
1.4.1 Design Consideration for Bandwidth Density and Optical Power Budget 39
1.4.2 Integrated Fabrication Process 40
1.4.3 Data Link Experiments 41
1.4.4 Significance of Bandwidth Density 43
1.5 Silicon Optical Interposers for Wide Temperature Range Operation 43
1.5.1 Hybridly Integrated Athermal Light Sources and Their Thermal Characteristics 44
1.5.2 Optical Modulators and Their Thermal Characteristics 46
1.5.3 Photodetectors and Their Thermal Characteristics 48
1.5.4 Data Link Experiments Over Wide Temperature Range 49
1.6 25-Gbps Data Links Using Silicon Optical Interposers and FPGA Transceivers 51
1.7 Advanced Fabrication Process and Optical Components for Wider Bandwidth in Future 53
1.7.1 Hybridly Integrated 1200-Channel Light Source 53
1.7.2 High-Speed Ring-Resonator-Based Optical Modulators 54
1.7.3 High-Speed Germanium Photodetectors with Low Contact Resistance 54
1.7.4 300-mm Wafer Processes with ArF Immersion Lithography for WDM 55
1.8 Perspectives on Inter-chip Interconnects 55
1.8.1 Vision for On-Board Datacenters 55
1.9 Optical I/O Cores 56
1.9.1 Further Efficient Interconnects for On-Board Datacenters 58
1.10 Conclusion 58
Acknowledgments 59
References 59
2 Silicon Quantum Photonics 63
Abstract 63
2.1 Introduction 63
2.1.1 Quantum Information 65
2.1.1.1 Entanglement 66
2.1.1.2 Path-Encoded Qubits 66
2.1.2 Optical Requirements for Quantum Applications 67
2.1.2.1 Photon Sources 68
2.1.2.2 Linear Optics 68
2.1.2.3 Single-Photon Detection 70
2.1.3 Scaling up Quantum Optics 70
2.1.4 Silicon Quantum Photonics 70
2.2 Linear Optics 71
2.2.1 Beam Splitter 72
2.2.1.1 Quantum Interference 72
2.2.1.2 Quantum Interference in Silicon Photonics 73
2.2.2 Phase Shifter 74
2.3 Photon Sources 75
2.3.1 Requirements for Photon Sources 76
2.3.2 A Brief Summary of SFWM Experiments in SOI 76
2.3.3 Theory of SFWM Sources 77
2.3.4 Silicon Waveguide Photon-Pair Sources 79
2.3.4.1 Phase Matching 79
2.3.4.2 Pair Generation Rate 80
2.3.4.3 Optimizing a Straight Waveguide Source for Brightness 81
2.3.4.4 Pair Generation Measurement 81
2.3.4.5 Analysis of Pair Generation Data 82
2.3.5 Ring Resonator 84
2.3.5.1 Optimization of the Ring Resonator for Pair Generation 87
2.3.5.2 Experimental Pair Generation in Ring Resonators 89
2.3.5.3 Joint Spectral Correlation and Source Purity 90
2.4 On-Chip Detectors 91
2.5 Integration 92
2.5.1 Multiple Sources 93
2.5.2 Sources and Filters 94
2.5.3 Multiple Sources and Interferometers 96
2.5.3.1 Integrated Path Entanglement Generation and Analysis 96
2.5.3.2 Entanglement Distribution Between Two SOI Chips 96
2.6 Outlook 97
2.6.1 Conclusion 97
References 98
3 Athermal Silicon Photonics 105
Abstract 105
3.1 Introduction 105
3.2 Background of Athermal Technology 106
3.2.1 Temperature-Dependent Wavelength Shift 106
3.2.2 Thermo-Optic Coefficient of Materials 107
3.2.3 Athermal Silica AWG 108
3.3 Athermal Silicon Photonics Using Polymer Cladding 110
3.4 Athermal Silicon Photonics Using Titania Cladding 115
3.5 Athermal Silicon MZI Without Negative TO Material 117
3.6 Summary 119
References 119
4 Design Flow Automation for Silicon Photonics: Challenges, Collaboration, and Standardization 121
Abstract 121
4.1 Silicon Photonics---History Repeats Itself 122
4.2 Photonic Integrated Circuit Design Methodologies and Flows 122
4.2.1 Front End Versus Building Blocks Methodology 123
4.2.2 Process Design Kit Driven Design 123
4.2.3 Overview of Flow---Comparison to Analog Design Flow 125
4.2.3.1 Schematic-Driven Layout 126
4.2.3.2 Design for Test and Manufacturability 127
4.2.3.3 Design Sensitivity 127
4.2.4 Schematic Capture 128
4.2.4.1 Interface to Simulation and Analysis 129
4.2.4.2 Matching Simulation to Layout 130
4.2.5 Photonic Circuit Modeling 130
4.2.5.1 Electronic Simulations Using SPICE 131
4.2.5.2 Electronic Versus Photonic Simulation 131
4.2.5.3 Photonic Circuit Simulation 132
4.2.5.4 Frequency Domain Analysis 134
4.2.5.5 Time Domain Analysis 135
4.2.6 Model Extraction for Compact Models 136
4.2.6.1 Methods and Challenges 137
4.2.6.2 Model Extraction from Physical Simulations 137
4.2.6.3 Compact Models in the Time Domain 137
4.2.6.4 Photonic Circuit Modeling Examples 138
4.2.7 Schematic-Driven Layout 138
4.2.7.1 Floorplanning 142
4.2.7.2 Routing 143
4.2.7.3 Specialty Design 143
4.2.8 Overview of Physical Verification for Silicon Photonics 144
4.2.8.1 Design Rule Checking 146
False Errors Induced by Curvilinear Structures 148
Multidimensional Rule Check on Tapered Structures 149
Density and Fill Insertion 151
4.2.8.2 Layout Versus Schematic 152
Challenges of Silicon Photonics for LVS 152
Adjustments to the LVS Flow 154
4.2.8.3 Parasitic Extraction 156
4.2.8.4 Design for Manufacturability 157
Lithographic Checking 158
PDKs for Silicon Photonics 160
4.3 Manufacturing and Lithography: Accuracy Problems and Process Variation 161
4.3.1 Silicon Photonics Fabrication Processes 161
4.3.2 Lithography 162
4.3.2.1 E-Beam Lithography 162
4.3.2.2 Deep UV Lithography 163
4.4 The ``CoDesign'' Problems 164
4.4.1 Co-layout 165
4.4.2 Co-simulation 165
4.4.3 Cointegration 166
4.4.4 Packaging 167
4.5 Standards Organizations Helping Evolve a Disintegrated Design, Manufacturing, Packaging, and Test Ecosystem 167
4.5.1 Photonics Fitting into EDA 167
4.5.2 Adding/Modifying for Photonics 168
4.5.3 Process Design Kits (PDKs) 168
4.5.3.1 Electronic PDKs 169
4.5.3.2 Silicon Photonic PDKs 169
4.5.3.3 Current Scope with Strengths and Weaknesses 170
4.5.3.4 Outlook 171
4.5.3.5 Optoelectronics 171
4.5.4 Formats 172
4.5.5 Standards Development Organizations 172
4.5.5.1 Silicon Integration Initiative (Si2) 172
4.5.5.2 PDAFlow Foundation 174
4.6 The Need for an Optoelectronic Unified Design Flow 174
4.7 Summary 176
References 176
5 Hardware--Software Integrated Silicon Photonics for Computing Systems 179
Abstract 179
5.1 Silicon Photonic Systems: A Subsystem Rationale 179
5.2 Chip-Scale Silicon Photonic Subsystems 180
5.2.1 Silicon Photonic Manufacturing Platforms 181
5.2.2 Photonic Packaging 181
5.2.3 End-to-End Connection in a Silicon Photonic Link 182
5.2.4 Systems Enabled by Programmable Logic Devices 184
5.2.5 System Considerations 185
5.3 Device Control for Thermal Stabilization 185
5.4 High-Speed Silicon Photonic Subsystems 186
5.4.1 Traveling-Wave Mach--Zehnder Modulator and Microring Modulators 187
5.4.2 Mach--Zehnder Interferometer and Microring Switches 189
5.4.3 Microring Performance Dependencies 190
5.5 Data Synchronization for Link-Based Delivery and Management 191
5.5.1 Burst Mode Data for Link Connections 191
5.5.2 Synchronization 192
5.5.3 Exploring Software Protocols for Circuit-Based Connection Management of Characterized Links 195
5.6 Hardware--Software Implementation for System Integration 197
5.6.1 Abstracting a Chip-Scale Silicon Photonic System 198
5.6.2 Software Control and Management 200
5.6.3 Example of Software Request-Grant-Based Control of Switched Silicon Photonic Circuits 203
5.6.4 Control-Centric Integration: Power-Optimized Silicon Photonic Spatial Switching 204
5.6.5 Network-Centric Integration: Programmable Wavelength Routing 206
5.7 Conclusion 208
Acknowledgments 208
References 208
6 Path to Silicon Photonics Commercialization: The Foundry Model Discussion 212
Abstract 212
6.1 Introduction 212
6.2 Silicon Photonics Technology Status 213
6.2.1 Fabless Semiconductor Model 213
6.2.2 Monolithic Integration Through CMOS Photonics 214
6.2.3 Technology Platform for Hybrid Integration 216
6.3 Role of Research and Development Foundries 220
6.3.1 Standardized Shuttle Runs 220
6.3.2 Customized Process Platform 223
6.3.3 Small Volume Production 223
6.4 Route to Commercialization 225
6.4.1 Manufacturing in CMOS Foundry 226
6.4.2 Process Qualification and Reliability 230
6.4.3 Outlook and Trends 231
6.5 Conclusion 233
Acknowledgment 234
References 234
7 Packaging of Silicon Photonic Devices 237
Abstract 237
7.1 Introduction 237
7.2 Optical Packaging 240
7.2.1 Fiber-Coupling 241
7.2.2 Grating-Coupling 242
7.2.3 Edge-Coupling 245
7.2.4 Laser Integration 246
7.2.5 Micro-Optic Hybrid Integration 247
7.2.6 VCSEL Hybrid Integration 248
7.3 Electrical Packaging 248
7.3.1 Packaging to PCB 249
7.3.1.1 3-D Electronic Packaging 249
7.3.1.2 2.5-D Electronic Packaging 252
7.4 Standardization 252
7.5 Conclusions 253
References 253
8 Silicon Photonics Packaging Automation: Problems, Challenges, and Considerations 257
Abstract 257
8.1 Introduction 257
8.2 Automated Fiber Array Pigtailing on Gratings 259
8.3 Optical Fiber Interface and Laser Integration on PICs: A Survey of Innovative Concepts and Automation Considerations 268
8.3.1 Optical Interface with External Fibers 269
8.3.1.1 Approach One 269
8.3.2 Approach Two 270
8.3.2.1 Approach Three 272
8.3.2.2 Approach Four 273
8.3.3 Laser Integration on PICs 276
8.4 Conclusions 278
References 278
9 CMOS Cost--Volume Paradigm and Silicon Photonics Production 280
Abstract 280
9.1 Introduction 280
9.2 Low Volume Production 282
9.2.1 Multi-project Wafers or MPWs for Affordable Prototyping 282
9.2.2 Commercial R& D Project
9.2.3 Corner Lot 284
9.2.4 Low Volume Production Lot 285
9.3 Markets and Volumes 285
9.3.1 Datacom 285
9.3.2 Telecom 287
9.3.3 Sensors 287
9.3.4 Volume Evolution 288
9.4 From Prototype to Volume Production: Technical Stages and Challenges 289
9.4.1 PDK and Design Flow 289
9.4.2 New Tape-Out (NTO) 289
9.4.2.1 Floor Planning 290
9.4.2.2 Test Sites: Process Control and Functional Test 290
9.4.2.3 IP Blocks 290
9.4.2.4 Manufacturing Rule Check 291
9.4.2.5 Tiling and Fracturing 291
9.4.2.6 OPC, LFD, Biasing 291
9.4.2.7 Mask-Shop Communication 292
9.4.3 Flow Setup and Follow-up 292
9.4.4 Qualification and Yield Analysis 293
9.4.5 Dicing 293
9.4.6 Packaging and Reliability 294
9.5 Summary 294
References 294
10 Silicon Photonics Research and Manufacturing Using a 300-mm Wafer Platform 296
Abstract 296
10.1 Introduction 296
10.2 Industrialization Strategy and Electronics: Photonics Integration 298
10.2.1 Silicon Photonics Qualification Methodology 298
10.2.2 Electronics and Photonics Integration 299
10.2.3 Industrial Testing Strategy for Wafer Sorting 302
10.3 Photonics Process Integration and Process Control on 300 mm Wafers 304
10.3.1 Optical Component Patterning 305
10.3.2 Active Optical Component Definition 306
10.3.3 Middle of Line (MEOL) and Back End of Line (BEOL) 306
10.3.4 Device Performance 306
10.3.5 Toward Optical Test Chip Development for Process and Performance Monitoring 307
10.3.5.1 Static Qualification Test Chips: Process Monitoring and 3-D FEBE Optical Compatibility 307
Process Monitoring 308
3-D FEBE Optical Compatibility 309
10.3.5.2 Dynamic Qualification Test Chips Without EIC: The Modulator Example 311
10.4 Design Kit and Spice Model Approach 313
10.4.1 Photonics Spice Model Development 314
10.4.1.1 Development Flow 314
10.4.1.2 Example: Phase Modulator and Photodiode 315
10.4.2 Spice Model Extraction Flow 317
10.4.3 Spice Models Hardware Correlation 317
10.4.3.1 The High-Speed Phase Modulator 317
10.4.3.2 The High-Speed Photo Detector 318
10.4.4 Spice Model Platform Capabilities 319
10.5 Process Exploration for Design and Performance Improvement 320
10.5.1 Improving Surface Coupling Efficiency 321
10.5.1.1 Substrate and Back Reflector Optimization 322
10.5.1.2 Substrate and Device Fabrication 323
10.5.1.3 Optical Characterization and Device Performance 323
10.5.2 Advanced Silicon Patterning 325
10.5.2.1 Limitation of Single Etched Waveguides 325
10.5.3 Application to Ring Modulator Devices 327
10.5.3.1 PN Versus PIN Architecture 328
10.5.3.2 Challenges in Ring Modulator Industrialization 328
10.5.3.3 Applications of Ring Modulators 330
References 331
11 Silicon Photonics-Based Signal Processing for Microwave Photonic Frontends 335
Abstract 335
11.1 Introduction 335
11.2 Silicon-Based Signal Processors 336
11.2.1 FIR Signal Processors 337
11.2.1.1 Silicon-on-Insulator (SOI) FIR Signal Processor Based on Cascaded MZIs 337
11.2.1.2 Si3N4 FIR Signal Processor [22, 23] 340
11.2.2 IIR Signal Processors 344
11.2.2.1 Si3N4 Microring IIR Filter [29] 344
11.2.3 FIR/IIR Hybrid Signal Processors 345
11.3 Silicon Photonics-Based Photonic Frontends 349
11.3.1 Parallel Down-Conversion Frontends [29] 349
11.3.2 OEO Frontends 351
11.4 Photonic-Assisted SDR Transceiver 356
11.5 Conclusions 362
Acknowledgements 363
References 363
12 Advanced Silicon Photonics Transceivers 366
Abstract 366
12.1 Introduction 366
12.2 Silicon Photonics for Optical Interconnect 367
12.3 Silicon Photonics Technology Advancements 368
12.3.1 Silicon Photonics Wafer Processing Flow 368
12.3.2 Silicon Photonics Devices 371
12.3.3 2.5 D Integration for Combining Electronic and Photonic Circuits 374
12.3.4 Wafer-Scale Optical Probing of Silicon Photonics 375
12.4 Advanced Optical Transceiver Design in Silicon Photonics Technology 378
12.4.1 Design Infrastructure: Design Kit 378
12.4.2 Transmitter Design 379
12.4.3 Receiver Design 381
12.4.4 Transceiver Architecture 382
12.5 Light Source for Silicon Photonics 384
12.6 Packaging 388
12.7 Conclusions 389
Acknowledgements 389
References 390
13 Optical Transceivers Using Heterogeneous Integration on Silicon 392
Abstract 392
13.1 Introduction 392
13.2 Heterogeneous Integration 393
13.2.1 Components 396
13.2.2 Lasers 396
13.2.3 Semiconductor Optical Amplifiers 397
13.2.4 Modulators 398
13.2.5 Photodiodes 399
13.2.6 Circuits 400
13.3 Packaging 407
13.4 Conclusion 411
References 411
14 Merits and Potential Impact of Silicon Photonics 413
Abstract 413
14.1 Technical Merits of Silicon Photonic Devices 414
14.1.1 High-Index-Contrast Silicon Waveguides 414
14.1.2 High Integration Level of Silicon Photonics 416
14.1.3 High Yield and Low Cost by Mature CMOS Fabrication 417
14.2 Applications 419
14.2.1 Telecommunication Applications 419
14.2.2 DataComm Applications 422
14.2.3 Chip-Scale Interconnects 424
14.3 Silicon Photonic Integrated Circuits 426
14.3.1 WDM Transmitters 426
14.3.2 WDM Receivers 428
14.3.3 Coherent Optical Transmitters 429
14.3.4 Coherent Optical Receivers 430
14.4 Conclusion 432
References 433
15 Silicon Photonics for Telecom and Datacom Applications 437
Abstract 437
15.1 Introduction 438
15.2 Optical Switching Devices for Access and Mobile Networks 438
15.2.1 Silicon Integrated Mini-ROADM 441
15.2.2 Silicon Integrated Devices for Multidirectional ROADMs 445
15.3 High Scale Photonic Integrated Device for Optical Switching in Metro Transport Nodes and Data Centers 448
15.3.1 Silicon Photonics Integrated TPA: IRIS Project 452
15.3.1.1 TPA Block Diagram 455
15.3.1.2 Optical Switching in Data Centers 457
15.4 Perspectives and Research Directions 459
References 460
16 Is Silicon Photonics a Competitive Technology to Enable Better and Highly Performing Networks? 463
Abstract 463
16.1 Introduction 464
16.2 Fundamental Characteristics of Rib-Waveguide Phase Shifter 465
16.2.1 Rib-Waveguide Phase Shifter in MZ Interferometer 465
16.2.2 Optical Loss Characteristics 467
16.2.3 Series Resistance Reduction for Shorter RC Delay 471
16.2.4 EO Response 473
16.3 Free-Carrier Plasma Dispersion for High-Speed Silicon Optical Modulator 474
16.3.1 Energy Transfer in Drude Theory 474
16.3.2 TEC-Free DC Optical Characteristics 476
16.3.3 Frequency Chirping 476
16.4 Silicon Optical Modulators in High-Capacity Optical Networks 478
16.4.1 On-off Keying Characteristics 478
16.4.2 Phase-Shift Keying Characteristics 480
16.4.2.1 Bpsk 480
16.4.2.2 Qpsk 481
16.4.2.3 Dp-Qpsk 482
16.5 Conclusion 485
References 485
17 Silicon Photonics Technologies: Gaps Analysis for Datacenter Interconnects 489
Abstract 489
17.1 Introduction 489
17.1.1 The New Internet 489
17.1.2 Datacenter Network Architecture 491
17.2 Performance Metrics for Intra-datacenter Interconnect 492
17.2.1 Cost 492
17.2.2 Power, Density, Size 494
17.2.3 Cable Efficiency 496
17.2.4 Latency 497
17.2.5 Serviceability: Pluggable Versus Embedded Transceivers 498
17.2.6 Performance 501
17.3 Conclusion 502
References 503
18 VLSI Photonics for High-Performance Data Centers 505
Abstract 505
18.1 Photonic-Interconnected Data Center Architectures 506
18.2 Si Microring-Based Transceivers 512
18.3 Hybrid III--V-on-Si Transceivers 516
References 527
Index 533