A Practical Approach to VLSI System on Chip (SoC) Design
Springer International Publishing (Verlag)
978-3-031-18365-2 (ISBN)
Now in a thoroughly revised second edition, this practical practitioner guide provides a comprehensive overview of the SoC design process. It explains end-to-end system on chip (SoC) design processes and includes updated coverage of design methodology, the design environment, EDA tool flow, design decisions, choice of design intellectual property (IP) cores, sign-off procedures, and design infrastructure requirements. The second edition provides new information on SOC trends and updated design cases. Coverage also includes critical advanced guidance on the latest UPF-based low power design flow, challenges of deep submicron technologies, and 3D design fundamentals, which will prepare the readers for the challenges of working at the nanotechnology scale.
A Practical Approach to VLSI System on Chip (SoC) Design: A Comprehensive Guide, Second Edition provides engineers who aspire to become VLSI designers with all the necessary information and details of EDA tools. It willbe a valuable professional reference for those working on VLSI design and verification portfolios in complex SoC designs
Veena S. Chakravarthi is the co-founder and an advisor of SenseSemi Technologies, Bangalore. She is a VLSI system architect. She holds a doctoral degree from Bangalore University for her research work on generalized power optimization design methodologies for application-specific integrated circuits. Over the years, she has established herself as a leading system architect of communications, optical, and wireless semiconductor solutions with a wide range of expertise in high-performance and low power system on chips (SoCs). She started her career at ITI Limited, a premier public sector company, and later joined MindTree Consulting, where she developed wireless IPs in Bluetooth and WLAN technologies. She has worked for Centillium India Limited and Transwitch India Limited, where she was involved in developing Gigabit EPON chipsets and communication processors. She has been a technical consultant for the companies Ikanos Communications and Periera Ventures and vice president of Asarva Chips & Technologies. Dr. Chakravarthi has filed six patents and has two granted patents in the United
States and India for inventions in VLSI and IoMT solutions. She is the author of the books A Practical
Approach to VLSI System on Chip (SoC) Design: A Comprehensive Guide (Springer, 2019), Internet of Things and M2M Communication Technologies (Springer, 2021), and SoC Physical Design: A Comprehensive Guide (Springer, 2022). She has authored numerous papers on VLSI and healthcare and has held chair and vice-chair positions with the IEEE Nanotechnology Council (NTC), Bangalore Section. She is a senior IEEE member.
Introduction.- SoC Design Methodology.- SOC Design Infrastructure.- System on Chip Components.- DFT and Synthesis.- Static Timing Analysis (STA).- VLSI System Verification.- Physical Design.- Advanced Techniques.- Reference Design: Specification to Layout.
| Erscheinungsdatum | 15.12.2023 |
|---|---|
| Zusatzinfo | XXXIV, 332 p. 207 illus., 114 illus. in color. |
| Verlagsort | Cham |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Gewicht | 563 g |
| Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
| Informatik ► Weitere Themen ► Hardware | |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | Clock Tree synthesis • Embedded Memory • Embedded Processor • Embedded Systems • Fabless design • Integrated Circuits • Memory compiler • semiconductor • SOC design • Standard cell library • Static Timing Analysis • System-on-Chip • UPF flow • Very Large Scale Integration • VLSI • VLSI-SoC |
| ISBN-10 | 3-031-18365-7 / 3031183657 |
| ISBN-13 | 978-3-031-18365-2 / 9783031183652 |
| Zustand | Neuware |
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