Behavior-based Mobile Robot Control on a Hybrid CPU-FPGA Architecture – iB2C on SoPC

Mobile robots are used in increasingly complex scenarios. This comes at the cost of increasingly complex control systems. At the same time, safety requirements have to be observed. This makes it difficult for the developer to keep track of the system and to provide guarantees, as well as to take possible external sources of error into account.

Behavior-based control paradigms, such as the integrated Behavior-based Control, have proven to be a good approach to address these problems. Up to now, the only existing implementation of control architectures based on it is in software. This yields a conflict between demands on real-time capability and performance and the limitations in terms of energy and available space. The underlying operating system also makes verification and debugging more difficult and adds additional error sources. The work at hand proposes to implement iB2C networks on a SoPC (System-on-Programmable-Chip) across the domains of CPU-based systems and FPGAs as a solution. The architecture enables event-based reactions, is real-time capable and deterministic for safety-relevant system aspects, while retaining the advantages of a high-level environment with a focus on systems with limited supply of resources, like mobile robots. To achieve this, specialties of an implementation and verification of iB2C-based control systems in VHDL are derived. The extension of the architecture to an SoPC is additionally discussed. Architectural principles of the integration of both domains are presented as well as specific considerations regarding the interface. Finally, a heuristic for the CPU-FPGA-partitioning of the system at an early design stage is developed. The merit of these findings is proven in a practical example system in several scenarios. It is shown, that the control architecture developed in this way satisfies both the functional and non-functional requirements of such robotic systems, while running on a comparatively low-power processing node.