Noise Contamination in Nanoscale VLSI Circuits - Selahattin Sayil

Noise Contamination in Nanoscale VLSI Circuits

Buch | Hardcover
XI, 136 Seiten
2022 | 1st ed. 2022
Springer International Publishing (Verlag)
978-3-031-12750-2 (ISBN)
85,59 inkl. MwSt
This textbook provides readers with a comprehensive introduction to various noise sources that significantly reduce performance and reliability in nanometer-scale integrated circuits. The author covers different types of noise, such as crosstalk noise caused by signal switching of adjacent wires, power supply noise or IR voltage drop in the power line due to simultaneous buffer / gate switching events, substrate coupling noise, radiation-induced transients, thermally induced noise and noise due to process and environmental Coverages also includes the relationship between some of these noise sources, as well as compound effects, and modeling and mitigation of noise mechanisms.

Selahattin Sayil received the M.Sc. degree from the Pennsylvania State University, University Park, PA, in 1996 and the Ph.D. degree in Electrical Engineering from Vanderbilt University, TN, in 2000. He is currently a Professor and Distinguished Faculty Fellow in Electrical Engineering at Lamar University, where he leads the VLSI CAD and Signal Integrity Group. His current research interests include mitigation of radiation effects in VLSI, interconnect delay and noise analysis, low-power design and testing. His teaching interests include online teaching, high-impact online labs and virtual team learning. He has authored two books, two book chapters and published near thirty refereed journal articles that include special feature articles, and presented at many international conferences. He is a member of IEEE and serves as an Associate Editor for International Journal of Electronics.

Introduction.- Interconnect Noise.- Clock Noise and Uncertainty.- Power Supply Noise.- Substrate Coupling Noise.- Radiation Induced Soft Error Mechanisms.- Thermally Induced Errors.- Impact of Process Variations.

Erscheinungsdatum
Reihe/Serie Synthesis Lectures on Digital Circuits & Systems
Zusatzinfo XI, 136 p. 95 illus., 42 illus. in color.
Verlagsort Cham
Sprache englisch
Maße 168 x 240 mm
Gewicht 418 g
Themenwelt Informatik Weitere Themen Hardware
Technik Elektrotechnik / Energietechnik
Technik Maschinenbau
Schlagworte CMOS Design & Reliability textbook • Interconnect Noise • Radiation Induced Soft Error • VLSI Design for Reliability textbook • VLSI Noise textbook
ISBN-10 3-031-12750-1 / 3031127501
ISBN-13 978-3-031-12750-2 / 9783031127502
Zustand Neuware
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