Phase Change Memory

Andrea Redaelli received the Laurea and Ph.D. degrees in electronic engineering from the Politecnico di Milano, Italy, in 2003 and 2007 respectively. During the Ph.D., he worked on Phase Change Memories in the Department of Electrical and Electronic Engineering (Politecnico di Milano), collaborating with the Non-Volatile Memory Technology Development Group of STMicroelectronics, Agrate Brianza. From 2007, he joined STMicroelectronics working on advanced technologies for Non-Volatile memories. From 2008 to 2013 he worked as cell lead engineer on 45 and 26 nm PCM technology developments, firstly as a Numonyx employee and then joining Micron Technology. In the same years, Andrea cooperated with the Department of Electrical Engineering, Politecnico di Milano, in holding master's classes on electronics and signal conditioning. His work areas included memory array architecture definition, design of test structures, process integration, cell operation modelling and cell electrical testing. He was also the coordinator of a European funded project under FP7 named PASTRY on low power PCM development. Since 2014 Andrea is working on 3DXpointTM technology, in charge of cell stack optimization and pathfinding activities. Andrea is author and co-author of more than 50 papers and about 70 patents and filed patent applications, resulting in a h-index of 21 according with google scholar.

Chapter 1. Memory overview and PCM introduction.- Chapter 2.Electrical transport in crystalline and amorphous chalcogenides.- Chapter 3.Thermal model and remarkable temperature effects on calcogenide alloys.- Chapter 4.Self-consistent numerical model.- Chapter 5.PCM main reliability features.- Chapter 6.Structure and properties of chalcogenide materials for PCM.- Chapter 7.Material Engineering for PCM Device Optimization.- Chapter 8.PCM scaling.- Chapter 9.PCM device design.- Chapter 10.PCM array architecture and management.- Chapter 11. PCM applications and an outlook to the future.