Test Generation of Crosstalk Delay Faults in VLSI Circuits - S. Jayanthy, M.C. Bhuvaneswari

Test Generation of Crosstalk Delay Faults in VLSI Circuits (eBook)

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2018 | 1st ed. 2019
XI, 156 Seiten
Springer Singapore (Verlag)
978-981-13-2493-2 (ISBN)
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This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.


Dr. S. Jayanthy is a Professor at the Department of Electronics and Communication Engineering, Sri Ramakrishna Engineering College, Coimbatore, India. She received her Master's and PhD from PSG College of Technology and Anna University, Chennai respectively. Prof. Jayanthy's research interests are in VLSI Design & Testing, Genetic Algorithms and Embedded Systems. With more than 20 years of teaching experience, she has published 2 chapters and more than 40 research papers in journals and for national and international conferences and has organized a number of workshops and national conferences in the areas of VLSI, Embedded systems and IOT. She is a life member of Indian Society for Technical Education and Institution of Electronics and Telecommunication Engineers
  
Dr. M.C. Bhuvaneswari is an Associate Professor at the Department of Electrical and Electronics Engineering, PSG College of Technology, Coimbatore, India. She received her BE in Electronics and Communications Engineering from Madras University, and her ME and PhD from Bharathiar University. Her research interests include Applied Electronics, VLSI Design and Testing, Genetic Algorithms, Digital System Design, and Microprocessors. She has published a book on VLSI and Embedded systems (2015) and authored more than 90 research papers in journals and for national and international conferences.  She is a life member of Indian Society for Technical Education, Institute of Engineers (India), Computer Society of India and Systems Society of India. Prof Bhuvaneswari was honored with Dakshinamoorthy award instituted by PSG College of Technology for Teaching Excellence in the year 2010


This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.

Dr. S. Jayanthy is a Professor at the Department of Electronics and Communication Engineering, Sri Ramakrishna Engineering College, Coimbatore, India. She received her Master’s and PhD from PSG College of Technology and Anna University, Chennai respectively. Prof. Jayanthy’s research interests are in VLSI Design & Testing, Genetic Algorithms and Embedded Systems. With more than 20 years of teaching experience, she has published 2 chapters and more than 40 research papers in journals and for national and international conferences and has organized a number of workshops and national conferences in the areas of VLSI, Embedded systems and IOT. She is a life member of Indian Society for Technical Education and Institution of Electronics and Telecommunication Engineers  Dr. M.C. Bhuvaneswari is an Associate Professor at the Department of Electrical and Electronics Engineering, PSG College of Technology, Coimbatore, India. She received her BE in Electronics and Communications Engineering from Madras University, and her ME and PhD from Bharathiar University. Her research interests include Applied Electronics, VLSI Design and Testing, Genetic Algorithms, Digital System Design, and Microprocessors. She has published a book on VLSI and Embedded systems (2015) and authored more than 90 research papers in journals and for national and international conferences.  She is a life member of Indian Society for Technical Education, Institute of Engineers (India), Computer Society of India and Systems Society of India. Prof Bhuvaneswari was honored with Dakshinamoorthy award instituted by PSG College of Technology for Teaching Excellence in the year 2010

Please see attached.

Erscheint lt. Verlag 20.9.2018
Zusatzinfo XI, 156 p. 49 illus., 7 illus. in color.
Verlagsort Singapore
Sprache englisch
Themenwelt Informatik Theorie / Studium Algorithmen
Technik Elektrotechnik / Energietechnik
Schlagworte Crosstalk delay faults • deterministic algorithms • Fuzzy Delay Model • Genetic Algorithm • Very Large Scale Integration
ISBN-10 981-13-2493-X / 981132493X
ISBN-13 978-981-13-2493-2 / 9789811324932
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