Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip

Dr. Pascal Meinerzhagen is a Senior Research Scientist at Intel Labs, Intel Corporation, performing research into energy-efficient, error-resilient circuits and systems in high-performance FinFET CMOS technology. Dr. Adam Teman is a tenure track Senior Lecturer and co-director of the Emerging NanoScaled Integrated Circuits and Systems (EnICS) Labs in the Faculty of Engineering at Bar-Ilan Univeristy. His research interests include energy-efficient digital circuit design with an emphasis on embedded memories and efficient physical implementation of VLSI systems.

Motivation.- Introduction to Gain-Cell Based eDRAMs (GC-eDRAMs).- GC-eDRAMs Operated at Scaled Supply Voltages.- Near- V T GC-eDRAM Implementations with Extended Retention Times.- Aggressive Technology and Voltage Scaling (to Sub- V T Domain).- Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications.- 4T Gain-Cell with Internal-Feedback for Ultra-Low Retention Power at Scaled CMOS Nodes.- Multilevel GC-eDRAM (MLGC-eDRAM).- Soft Error Tolerant Low Power 4T Gain-Cell Array with Multi-Bit Error Detection and Correction.- Conclusions.