Communication, Devices, and Computing (eBook)

Preface 6
Committee 8
Patron 8
Joint Organizing Secretary 8
Joint Convener 8
Program Committee Members 8
Technical Program Committee Members 9
Additional Reviewers 11
Advisory Committee 11
Organizing Committee 11
Contents 13
Message from the Volume Editors It is a great pleasure for us to organize the first International Conference on Communication, Devices, and Computing (ICCDC 2017) held during November 2–3, 2017, at the Haldia Institute of Technology, Purba Medinipur, West Bengal, India. Our main goal is to provide an opportunity to the participants to learn about contemporary research in the area of Communication, Devices, and Computing and to exchange ideas among themselves and with experts present in the conference as invited speakers. It is our sincere hope that the conference will help the participants in their research and training. Also will open new avenues of work for those who are either starting their research or looking for extending their area of research in Communication, Devices, and Computing.After an initial call for papers, 62 papers were submitted for presentation at the conference. All submitted papers were sent to external referees, and after refereeing, 29 papers were recommended for publication in the conference proceedings which will be published by Springer in its Lecture Notes on Electrical Engineering (LNEE) series.We are grateful to the speakers, participants, referees, organizers, sponsors, and funding agencies (DRDO, ISRO) for their support and help, without which it would have been impossible to organize this conference. We express our gratitude to the organizing committee members who work behind the scene tirelessly to make this conference successful. 16
It is a great pleasure for us to organize the first International Conference on Communication, Devices, and Computing (ICCDC 2017) held during November 2–3, 2017, at the Haldia Institute of Technology, Purba Medinipur, West Bengal, India. Our main goal is to provide an opportunity to the participants to learn about contemporary research in the area of Communication, Devices, and Computing and to exchange ideas among themselves and with experts present in the conference as invited speakers. It is our sincere hope that the conference will help the participants in their research and training. Also will open new avenues of work for those who are either starting their research or looking for extending their area of research in Communication, Devices, and Computing.After an initial call for papers, 62 papers were submitted for presentation at the conference. All submitted papers were sent to external referees, and after refereeing, 29 papers were recommended for publication in the conference proceedings which will be published by Springer in its Lecture Notes on Electrical Engineering (LNEE) series.We are grateful to the speakers, participants, referees, organizers, sponsors, and funding agencies (DRDO, ISRO) for their support and help, without which it would have been impossible to organize this conference. We express our gratitude to the organizing committee members who work behind the scene tirelessly to make this conference successful. 16
About the Editors 17
Binary Error Correcting Code for DNA Databank 18
1 Introduction 18
2 DNA Databank or DNA Database 22
2.1 Types of DNA Databases 22
3 Importance of DNA Databank 23
4 Binary ECC Code for DNA Sequences 24
4.1 Proposed SEC Encoding Steps 24
4.2 Proposed SEC Decoding Steps 25
4.3 Reviriego et al. SEC (280, 256) Code for Any Arbitrary DNA Sequence 26
5 Conclusion 28
References 28
Proactive and Reactive DF Relaying for Energy Harvesting Underlay CR Network 30
1 Introduction 30
2 System Architecture 32
2.1 Network Model 32
2.2 Relay Selection Schemes 34
3 Simulation Model 35
4 Results and Discussions 36
5 Conclusion 39
References 39
Butler Matrix Fed Exponentially Tapered H-Plane Horn Antenna Array System Using Substrate Integrated Folded Waveguide Technology 41
1 Introduction 41
1.1 Butler Matrix Array 42
1.2 Substrate Integrated Waveguide and Substrate Integrated Folded Waveguide 44
2 Design of SIFW H-Plane Exponentially Tapered Horn Antenna 45
3 Design of SIFW M-BFAS Using Exponentially Tapered H-Plane Horn Antenna 48
4 Conclusion 52
References 52
Computing Characteristic Impedance of MIM Nano Surface Plasmon Structure from Propagation Vector Characteristics for Skin Depth Measurement 54
1 Introduction 54
2 Mathematical Modeling 55
3 Results and Discussions 57
4 Conclusion 61
References 61
Extended Directional IPVO for Reversible Data Hiding Scheme 62
1 Introduction 62
2 Proposed Method 63
2.1 Data Embedding Procedure 64
2.2 Minimum Modification-Based Data Embedding 65
2.3 Maximum Modification-Based Data Embedding 66
2.4 Data Extraction Procedure 67
2.5 Minimum Modification-Based Data Extraction 68
2.6 Maximum Modification-Based Data Extraction 68
3 Experimental Result 69
4 Conclusion 72
References 72
Hamming Code-Based Watermarking Scheme for Image Authentication and Tampered Detection 74
1 Introduction 74
2 Proposed Watermarking Scheme 76
2.1 Watermark Embedding 76
2.2 Watermark Extraction 76
3 Experiment and Comparison 78
4 Steganalysis 80
5 Attacks 80
6 Conclusion 81
References 82
RS (255, 249) Codec Based on All Primitive Polynomials Over GF(28) 83
1 Introduction 84
2 M-ary Phase-Shift Keying (MPSK) Modulation Technique 85
3 Primitive Polynomials in GF(28) Field 86
4 Design of RS (255, 249) Encoder and Decoder Block 86
4.1 RS (255, 249) Encoder Block 86
4.2 RS (255, 249) Decoder Block 88
5 Theoretical Complexity of RS (255, 249) Encoder and Decoder 90
6 Synthesis Results 90
7 Conclusion 94
References 94
Secure User Authentication System Using Image-Based OTP and Randomize Numeric OTP Based on User Unique Biometric Image and Digit Repositioning Scheme 96
1 Introduction 97
2 Background Study 97
3 Preliminaries 97
3.1 BWMAS Operation (Bit-wise Masking and Alternate Sequence) 97
4 Overall Procedure 98
5 Formation of OTP at Authentication Server End 98
5.1 Algorithm for Generation and Encryption of Image OTP 99
5.2 Algorithm for Generating Numeric OTP 99
5.3 Algorithm for Digit Repositioning Schemes 99
6 Distribution of Image-Based OTP and Numeric OTP 100
7 Extraction of OTP at User End and Authentication 100
8 Results and Comparisons 100
8.1 Inputs at User Registration Time to Authentication System 100
8.2 Formation of Image-Based OTP at Server End 101
8.3 Generation of First-Level Numeric OTP 101
8.4 Generation of Biometric Image-Based Second-Level Numeric OTP 102
8.5 Intermediate OTP Generated After Alternate Merge Between Two OTPs 102
8.6 Generation of Final OTP 102
8.7 Distribution of Encrypted Image OTP and Intermediate Numeric OTP Through User Email and Message 103
8.8 Extraction of Image OTP and Numeric OTP at User End 103
8.9 User Authentication 104
9 Comparison of Existing OTP Systems and Security Analysis 104
10 Conclusions 106
References 106
Application of RCGA in Optimization of Return Loss of a Monopole Antenna with Sierpinski Fractal Geometry 107
1 Introduction 107
2 Antenna Design 108
3 Genetic Algorithm 109
4 Application of GA in Antenna Design 109
5 Results and Discussion 111
6 Conclusion 113
References 114
Improvement of Radiation Performances of Butler Matrix-Fed Antenna Array System Using 4 × 1 Planar Circular EBG Units 115
1 Introduction 115
1.1 Butler Matrix Array 116
1.2 Electromagnetic Band Gap Structure 118
2 Design of 4 × 1 Planar Circular EBG Unit 118
3 Design of Butler Matrix-Fed Antenna Array System Incorporated with 4 × 1 EBG Units 119
4 Conclusion 124
References 124
Improving Security of SPN-Type Block Cipher Against Fault Attack 126
1 Introduction 126
2 Description of SPN-Type Block Cipher Algorithm 127
3 Fault Attack on Ninth Round of the Proposed SPN-Type Architecture 129
3.1 A Working Example 134
3.2 Comparison with Existing Works 135
4 Conclusion 136
References 137
High-Capacity Reversible Data Hiding Scheme Using Dual Color Image Through (7, 4) Hamming Code 138
1 Introduction 138
2 Proposed Method 140
2.1 Numerical Illustration 141
3 Experimental Result and Comparison 146
4 Security Analysis 148
5 Conclusion 149
References 149
A Study on the Effect of a Rectangular Slot on Miniaturization of Microstrip Patch Antenna 151
1 Introduction 151
2 Antenna Design 152
3 Equivalent Circuits 153
4 Results and Discussion 155
5 Conclusion 158
References 159
FPGA Implementation of OLS (32, 16) Code and OLS (36, 20) Code 161
1 Introduction 162
2 Orthogonal Latin Square Codes 163
2.1 Construction of the Parity Check Matrix 164
3 Design of OLS Codec 167
4 VLSI Implementation 169
5 Conclusion 170
References 170
Comparative Study of Wavelets for Image Compression with Embedded Zerotree Algorithm 172
1 Introduction 172
2 Discrete Wavelet Transform in Image Compression 173
3 Wavelets and Their Properties 174
4 Image Compression Using EZW Algorithm 174
5 Experiment and Results 175
6 Conclusion 179
7 Future Work 180
References 180
Design of Compact Wideband Folded Substrate-Integrated Waveguide Band-Pass Filter for X-band Applications 181
1 Introduction 181
2 Design of Substrate-Integrated Waveguide (SIW) 182
2.1 SIW Design Formulas 183
3 Design of Folded Substrate-Integrated Waveguide (FSIW) 183
3.1 Design and Analysis of FSIW (with C Slot on Central Metal Septum of FSIW) 185
3.2 Design and Analysis of FSIW (with E Slot on Central Metal Septum of FSIW) 186
4 Results and Conclusion 187
References 188
DCT-Based Gray Image Watermarking Scheme 189
1 Introduction 189
2 Proposed Scheme 190
2.1 Pseudorandom Non-repeated Position Generator 191
2.2 Discrete Cosine Transform (DCT) 192
2.3 Embedding Watermark 192
2.4 Extraction of Watermark 193
3 Experimental Results 193
4 Performance Evaluation 193
4.1 Imperceptibility 194
4.2 Robustness 194
4.3 Error Probability 195
4.4 Comparative Study 195
4.5 Attack and Analysis 195
5 Conclusions 197
References 197
Five-Input Majority Gate Design with Single Electron Nano-Device 198
1 Introduction 198
1.1 Single Electron Device 199
2 Five-Input Majority Gate Implementation 199
3 Simulation Results of Five-Input Majority Gate 201
4 Conclusion 202
References 203
Post-layout Power Supply Noise Suppression and Performance Analysis of Multi-core Processor Using 90 nm Process Technology 205
1 Introduction 205
2 Power Distribution Network and Supply Noise 206
2.1 Ldi(t)/dt Noise 206
2.2 IR Noise 206
3 Budget for Decoupling Capacitance 207
4 CAD Methodology 208
5 Simulation Results and Analysis 209
6 Conclusion and Future Scope 210
References 210
Enhanced Performance of GaN/InGaN Multiple Quantum Well LEDs by Shallow First Well and Stepped Electron-Blocking Layer 212
1 Introduction 213
2 Device Structure 213
3 Simulation Framework 214
4 Results and Discussion 215
5 Conclusion 219
References 219
A µ-Controller-Based Biomedical Device to Measure EMG Strength from Human Muscle 221
1 Introduction 221
2 System Description 222
2.1 EMG Sensors 222
2.2 Signal Processing Circuitry 222
2.3 Embedded Circuit Board 224
3 System Operation 226
4 Calculation 228
5 Flow Chart Diagram 229
6 Result and Discussion 230
References 230
Design and Implementation of a DCM Flyback Converter with Self-biased and Over-Current Protection Circuit 232
1 Introduction 232
2 Operation of Flyback Converter 235
2.1 Operation During on Period of Switch 235
2.2 Operation During off Period of Switch 237
3 Design of Flyback Converter 237
3.1 Input 238
3.2 Buck Converter 238
3.3 Snubber Circuit 239
3.4 Feedback Isolation 239
3.5 Control Section 239
3.6 Output Section 239
4 Result and Discussion 240
5 Conclusion 242
References 242
Performance Improvement of Light-Emitting Diodes with W-Shaped InGaN/GaN Multiple Quantum Wells 243
1 Introduction 243
2 Device Structure and Simulation Framework 244
3 Results and Discussion 246
4 Conclusion 251
References 252
Behavioral Modeling of Differential Inductive Seismic Sensor and Implementation of Its Readout Circuit 254
1 Introduction 254
2 Behavioral Modeling of Differential Inductive Seismic Sensor 255
2.1 Structure and Working Principle 255
2.2 Mathematical Foundation 256
3 Readout Circuit Design and Implementation 259
4 Results and Discussion 260
5 Conclusion 262
References 262
Application of PSO Variants for Optimal Design of Two-Stage CMOS Op-amp with Robust Bias Circuit 264
1 Introduction 264
2 Specifications for Design and Formulation of Cost Function 265
3 Evolutionary Algorithms Used 266
4 Discussions of Simulation Results 267
5 Conclusions 273
References 273
Representation and Exploring the Semantic Organization of Bangla Word in the Mental Lexicon: Evidence from Cross-Modal Priming Experiments and Vector Space Model 274
1 Introduction 274
2 Related Work 275
3 The Priming Experiment 1 276
3.1 Materials 277
3.2 Procedure 277
3.3 Participants 278
3.4 Results and Discussion 278
4 The Priming Experiment 2 279
4.1 Material and Procedure 279
4.2 Participants 279
4.3 Results and Discussion 279
5 Analyzing the Effect of Semantic Priming Using Computational Model (VSM) 280
6 Conclusions 281
References 281
Solving a Solid Transportation Problems Through Fuzzy Ranking 283
1 Introduction 283
2 Mathematical Model of FSTP 284
3 Solution Method 285
3.1 Algorithm for Proposed Method-1 285
3.2 Use of Fuzzy Expectation and GRG: 288
4 Numerical Experiments: 288
4.1 Optimum Results by Method-1: 288
4.2 Optimum Results by Method-2: 291
5 Conclusion 291
References 291
Optimal Design of Low-Noise Three-Stage Op-amp Using PSO Algorithm 293
1 Introduction 293
2 Optimization Algorithm Employed 294
3 Design Specifications for the CMOS TSCOA 295
4 Discussions on Simulation Results 296
5 Conclusion 301
References 301
Optimal Design of Low-Voltage, Two-Stage CMOS Op-amp Using Evolutionary Techniques 302
1 Introduction 302
2 Design Specifications and Objective Function Formulation 303
3 Evolutionary Algorithm Employed 306
4 Simulation Results and Discussions 307
5 Conclusions 309
References 314