Exploitation of Fine-Grain Parallelism

Dr. Günter Böckle received a MSc degree in Mathematics from the Technical University Stuttgart in 1973 and a PhD (Dr. rer. nat.) in 1976. He joined Siemens 1977 and has since worked in several departments. His major working areas include modeling, simulation, system assessment and performance validation, processor and bus architecture development, and operating system development. He worked in the USA in a joint product development with a major microprocessor manufacturer. Specializing in parallel systems, he focused on instruction-level parallelism. Since several years he is working in the field of systems engineering, currently with emphasis on requirements engineering. Since 1999 the focus shifted to system family engineering.

Kinds of parallelism.- Architectures for fine-grain parallelism.- VLIW machines.- Constraints on VLIW architectures.- Architectural support for exploitation of fine-grain parallelism.- Constraints for instruction scheduling.- Instruction-scheduling methods.- Developing instruction-scheduling methods.- Tools for instruction scheduling.- The machine model.- The horizontal instruction-scheduler.- Resource management.- Exceptions.- Vertical instruction-scheduling.- Conclusion.