Frontiers in Analog CAD (FAC 2017)

Actual trends like cyber physical systems, internet of things and autonomous driving push the need for a lot of analog content on integrated circuits to connect to the physical world. Verification and design of these analog parts takes a lot of effort of the overall design process. Additionally, actual standards like ISO 26262 increase the pressure to get the verification formalized and automatized. Using current methodologies, even well- understood analog circuits require nearly as much effort to modify and/or port to a new process as the initial design. Even when an analog circuit can be reused, validating its performance within the new system - especially if the circuit is controlled through a digital loop - is often the long pole in the overall flow. The reasons for this situation are both technical and sociological; inherent differences in the behaviors of digital vs. analog systems make analog design and validation much more resistant to automation. Similarly, the cultural distance between the EDA software developers and analog designers is much larger than the distance between them and digital designers.

The goal of this workshop is to bring together technologists and researchers from analog design as well as CAD tool development to foster collaboration and exchange of ideas as well as to spur further research into the intersection of these domains. The workshop has a long tradition (since 2005) mainly in the area of formal verification.