Noise-Shaping All-Digital Phase-Locked Loops
Modeling, Simulation, Analysis and Design
Seiten
2016
|
1. Softcover reprint of the original 1st ed. 2014
Springer International Publishing (Verlag)
978-3-319-34441-6 (ISBN)
Springer International Publishing (Verlag)
978-3-319-34441-6 (ISBN)
This book offers a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), covering time-to-digital converters, noise shaping and more. Includes advice on analysis and simulation techniques, and reusable Matlab code.
This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.
This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.
Introduction.- Phase Digitization in All-Digital PLLs.- A Unifying Framework for TDC Architectures.- Analytical Predictions of Phase Noise in ADPLLs.- Advantages of Noise Shaping and Dither.- Efficient Modeling and Simulation of Accumulator-Based ADPLLs.- Modelling and Estimating Phase Noise with Matlab.
| Erscheinungsdatum | 02.09.2016 |
|---|---|
| Reihe/Serie | Analog Circuits and Signal Processing |
| Zusatzinfo | XIII, 177 p. 145 illus., 79 illus. in color. |
| Verlagsort | Cham |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Themenwelt | Mathematik / Informatik ► Informatik |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | All-Digital Phase-Locked Loops • Analog Circuits and Signal Processing • Circuits and Systems • Electronics and Microelectronics, Instrumentation • Electronics: circuits and components • Electronics engineering • Engineering • Imaging systems and technology • Modeling All-Digital Phase-Locked Loops • Noise Shaping and Dither • Phase Noise in All-Digital Phase-Locked Loops • Phase Noise in Oscillators • Signal, Image and Speech Processing • Signal Processing • Time-to-Digital Converters |
| ISBN-10 | 3-319-34441-2 / 3319344412 |
| ISBN-13 | 978-3-319-34441-6 / 9783319344416 |
| Zustand | Neuware |
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