VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design
Springer Berlin (Verlag)
978-3-662-52529-6 (ISBN)
FPGA-Based High-Speed Authenticated Encryption System.- A Smart Memory Accelerated Computed Tomography Parallel Backprojection.- Trinocular Stereo Vision Using a Multi Level Hierarchical Classification Structure.- Spatially-Varying Image Warping: Evaluations and VLSI Implementations.- An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing.- Configurable Low-Latency Interconnect for Multi-core Clusters.- A Hexagonal Processor and Interconnect Topology for Many-Core Architecture with Dense On-Chip Networks.- Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections.- On the Automatic Generation of Software-Based Self-Test Programs for Functional Test and Diagnosis of VLIW Processors.- SEU-Aware Low-Power Memories Using a Multiple Supply Voltage Array Architecture.- CMOS Implementation of Threshold Gates with Hysteresis.- Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates.
Erscheinungsdatum | 02.09.2016 |
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Reihe/Serie | IFIP Advances in Information and Communication Technology |
Zusatzinfo | X, 235 p. 121 illus. in color. |
Verlagsort | Berlin |
Sprache | englisch |
Maße | 155 x 235 mm |
Themenwelt | Mathematik / Informatik ► Informatik ► Netzwerke |
Mathematik / Informatik ► Informatik ► Theorie / Studium | |
Informatik ► Weitere Themen ► Hardware | |
Schlagworte | adaptive routing • Computer Hardware • Computer networking and communications • Computer Science • Computer System Implementation • Computer Systems Organization and Communication Ne • multi-core processor • Network-on-Chip • smart memory • systems analysis and design • threshold gates |
ISBN-10 | 3-662-52529-1 / 3662525291 |
ISBN-13 | 978-3-662-52529-6 / 9783662525296 |
Zustand | Neuware |
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