Spectral Techniques in VLSI CAD

Spectral Techniques in VLSI CAD have become a subject of renewed interest in the design automation community. This title describes several applications of spectral techniques in discrete function manipulation including decision diagram minimization, logic function synthesis, technology mapping and equivalence checking.

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Spectral Techniques in VLSI CAD have become a subject of renewed interest in the design automation community due to the emergence of new and efficient methods for the computation of discrete function spectra. In the past, spectral computations for digital logic were too complex for practical implementation. The use of decision diagrams for spectral computations has greatly reduced this obstacle allowing for the development of new and useful spectral techniques for VLSI synthesis and verification. Several new algorithms for the computation of the Walsh, Reed-Muller, arithmetic and Haar spectra are described. The relation of these computational methods to traditional ones is also provided.
Spectral Techniques in VLSI CAD provides a unified formalism of the representation of bit-level and word-level discrete functions in the spectral domain and as decision diagrams. An alternative and unifying interpretation of decision diagram representations is presented since it is shown that many of the different commonly used varieties of decision diagrams are merely graphical representations of various discrete function spectra. Viewing various decision diagrams as being described by specific sets of transformation functions not only illustrates the relationship between graphical and spectral representations of discrete functions, but also gives insight into how various decision diagram types are related.
Spectral Techniques in VLSI CAD describes several new applications of spectral techniques in discrete function manipulation including decision diagram minimization, logic function synthesis, technology mapping and equivalence checking. The use of linear transformations in decision diagram size reduction is described and the relationship to the operation known as spectral translation is described. Several methods for synthesizing digital logic circuits based on a subset of spectral coefficients are described. An equivalence checking approach for functional verification is described based upon the use of matching pairs of Haar spectral coefficients.