Computer Programming and Architecture (eBook)

Front Cover 1
Computer Programming and Architecture: The VAX 5
Copyright Page 6
Table of Contents 9
Preface 19
Chapter 1. Architecture and Implementation 23
Organization of This Book 23
Review of Number Systems 25
Number Systems 25
Binary and Hexadecimal Representations 27
Negative Numbers 28
Exercises 30
Chapter 2. Computer Structures and the VAX 32
Computer Structures 32
The Memory 32
The Central Processing Unit 35
Instruction Execution 35
Classes of Instruction Architectures 38
The Input/Output System 39
Describing Computer Structures 40
Introduction to the VAX 42
VAX Information Units and Data Types 44
Integers 46
Floating-Point Numbers 47
Alphanumeric Characters 51
Decimal Strings 52
Summary of Data Types 53
Summary 55
Exercises 56
Chapter 3. The Program Assembler and Debugger 58
Assembler Statement Types 59
VAX Instruction Format 60
The Functions of a Symbolic Assembler 63
The Location Counter 64
Symbols 65
Constants 66
Storage Allocation 66
Storing Strings 68
Expressions 70
Control Statements 71
Labels 72
The Listing 73
The Assembly Process 73
The Program Debugger 75
Using the Debugger 78
Examining and Depositing 79
Basic Control Flow 80
Setting Breakpoints, Watchpoints, and Tracepoints 81
Using the Screen 82
First Program Example: Simple Output 82
Conventions for Writing Programs 87
Exercises 88
Chapter 4. Instruction and Addressing Fundamentals 91
VAX Instruction Characteristics 91
Generic Operations 92
Control Flow 92
Operand-Addressing Techniques 99
Simple Addressing 99
Immediate Mode 102
General-Purpose Registers 104
Indirect Mode 106
Register Autoincrement and Autodecrement Modes 109
Operand Context 111
Displacement Mode 113
Index Mode 116
A Simple Example 118
Exercises 120
Chapter 5. VAX Instruction Encoding 123
General Instruction Format 123
Encoding an Instruction 124
Program-Counter Relative Addressing 127
Immediate Addressing 130
Absolute Addressing 132
Branch Addressing 133
Summary 134
Exercises 138
Cahpter 6. Advanced Control Structures 140
The Jump Instruction 140
Case Statements 141
Loops 144
The Stack 147
Subroutines and Procedures 153
Argument Lists and Call Instructions 155
The Argument Pointer 157
Saving Registers 157
An Example Procedure 159
The Call Frame 160
Local Variables 163
Fast Linkages 164
Recursion 167
Reentrant Routines 170
Macros 172
Creating Local Labels 174
Macro Calls within Macro Definitions 175
Argument Concatenation 176
Repeat Blocks 176
Conditional Assembly 179
Summary 181
Exercises 181
Chapter 7. More VAX Data Types 184
Bits and Bit Fields 184
Logical Bit Instructions 184
Single-Bit Instructions 186
Converting Integer Data Types 193
Character Strings 196
Packed Decimal String Instructions 200
Multiple-Precision Integer Arithmetic 202
Floating-Point Arithmetic 204
Exercises 206
Chapter 8. Linked Data Structures 208
Multi-Element Structures and Records 208
Arrays 209
Circular Lists 210
Linked Lists 213
Doubly Linked Lists 219
Self-Relative Queues 226
Trees 228
Summary 232
Exercises 233
Chapter 9. Analysis of the VAX Instruction Set 234
Exercises 238
Chapter 10. Comparative Architectures 240
General Issues in Instruction Set Design 240
The IBM System 360/370 241
The CDC Cyber Series 246
The Intel 80386 Microprocessor 253
Reduced Instruction Set Computers 256
Berkeley RISC II 258
Summary 263
Exercises 264
Chapter 11. Physical Input and Output 265
I/O Processing 266
Control and Status Registers and I/O Space 268
Low-Speed Devices 269
The Line Printer 269
Terminal Multiplexing 271
High-Speed Devices 273
Magnetic Disks 273
Simplified Disk Control 275
Magnetic Tape 280
Mass Storage Control Protocol 281
Networks 283
The Initial Bootstrap Problem 286
Summary 286
Exercises 287
Chapter 12. The Support of an Operating System 288
Sharing the Processor 289
Sharing the Memory 290
Processes 295
Processor Access Modes 296
Process Access Mode Stacks 297
Changing Modes 298
Checking for Accessibility 300
Process Context Switching 301
Summary of Process Concepts 302
VAX Memory Management 303
VAX Memory Structure 304
VAX Page Tables 306
VAX Address-Space Regions 307
System Space 309
Process Space 309
Privileged Processor Registers 312
Summary of Memory Management Concepts 314
Interrupt and Exception Handling 315
Interrupts and Exceptions 315
Interrupts 316
Exceptions 316
Interrupt and Exception Vectors 318
Software Interrupts 319
Summary of Condition and Exception Handling 321
Summary 321
Exercises 322
Chapter 13. T h e Structure of a VAX Operating System 324
Process Scheduling 324
VMS Process Scheduling 325
VMS Scheduler Context-Switch Example 329
Process Paging 332
VMS Memory Management 335
Paging under VMS 336
Swapping under VMS 338
Input and Output Processing 339
The VMS I/O System 340
VMS I/O Database 341
VMS I/O System Components 344
I/O Control Flow 345
The Use of Interrupt Priority Levels 347
Synchronizing I/O Database Access 350
System Service Implementation 351
Summary 352
Exercises 353
Chapter 14. Caches and Translation Buffers 354
Choice of Memory Technology and Structure 354
The Fastest Technology Approach 355
Cache Memory Approach 355
Associative Memories and Cache Organization 356
Issues in Cache Design 359
Cache Coherency in Multiprocessors 362
Multilevel Caches 363
An Example Cache Organization: The VAX 6200 364
The Translation Buffer 367
The Instruction Buffer 370
Summary 371
Exercises 371
Chapter 15. Microprogramming 373
Instruction to Microprogramming 373
Organization of a Simple Micromachine 375
The Data Path in a Simple Machine 376
The Control Unit in a Simple Machine 379
The MicroVAX I Microarchitecture 381
The MicroVAX I Data Path 383
MicroVAX I Data-Path Control 386
Microinstruction Branching 389
Execution of a VAX Instruction 392
Microarchitecture Alternatives 395
Exercises 396
Chapter 16. Parallelism and Parallel Computer Systems 398
Classifying Multicomputer Systems 400
Pipelined Processors 403
Multiple Functional Units and Hazards 405
Vector Machines: The Cray-1 407
Multiprocessors 409
Multiprocessor Organizations 411
What Is Required for Multiprocessing? 415
Examples of Multiprocessor Systems 417
The Connection Machine: A Highly Parallel SIMD Machine 417
The Butterfly: An Interconnection Network Machine 419
MIMD Hypercube Machines 420
Summary 422
Exercises 422
Appendix A The Ultrix Assembler 425
Appendix B VAX Instruction Set Description 433
Bibliography 447
Index 451