Instructor's Manual for "an Assembly Language Introduction to Computer Architecture: Using the Intel Pentium"

Part 1 Background and introduction: levels of abstraction; from program to execution; a brief history of computer development; the Intel iAPX architecture. Part 2 Computer basics: the pieces and parts; memory operation; the instruction fetch and execute cycle; performance. Part 3 SASM-simple abstract language: assembly and compilation; variable declaration; arithmetic operations; control structures; communications with the user; a SASM program. Part 4 Number systems: numbers and their representation; weighted positional notation; transformations between radices; representation of noninteger numbers. Part 5 Data representation: numbers versus their representation; representation of integers; characters; floating point representation; a little extra on complement representation. Part 6 Arithmetic and logical operations: logical operations; shift operations; addition and subtraction; multiplication; division. Part 7 Floating point arithmetic: hardware versus software calculations; addition and subtraction; multiplication; division; advanced topics. Part 8 Data structures: memory as an array; arrays; stacks; queues. Part 9 Using registers for efficiency: instructions and efficiency; registers; load/store architectures; addressing modes. Part 10 The Pentium architecture: generalities; registers; memory model; addressing modes; instruction set; code examples. Part 11 Procedures: procedure call and return mechanisms; dynamic storage allocation; activation records; parameter passing; saving registers; a Pentium program that uses procedures. Part 12 The assembly process: where assemblers fit in, and what assemblers do; machine code format and code generation; linking and loading. Part 13 Input and outpu: typical I/O devices; the processor-I/O interface; direct memory access (DMA). Part 14 Interrupts and exception handling; the mechanism; the role of the operating system; the Pentium exception mechanism; advanced issues in exception handling. Part 15 Features for architectural performance: mimimal instruction sets and choices; instruction level parallelism; memory hierarchies. Part 16 Architecture in perspective: what's all this about RISC?; the single-chip constraint; the Motorola 68000 family; the Cray-1; MIPS RISC; SPARC; Alpha; memory management and virtual memory, Barton P. Miller. Part 17 Basic concept and terms: base and bounds; segmentation; segmentation on the Pentium; paging; paging and segmentation; multilevel paging; page and segment attributes. Appendices: reserved words; SASM; machine language specification.