Hardware Description Languages and their Applications

1 Synchronous languages for hardware and software reactive systems.- 2 Towards a complete design method for embedded systems using Predicate/Transition-Nets.- 3 Simplifying data operations for formal verification.- 4 CTL and equivalent sublanguages of CTL.- 5 Verifying linear temporal properties of data intensive controllers using finite instantiations.- 6 A high-level language for programming complex temporal behaviors and its translation into synchronous circuits (poster abstract).- 7 System-level hardware design with ?-charts (poster abstract).- 8 Interface synthesis in embedded hardware-software systems (poster abstract).- 9 TripleS-a formal validation environment for functional specifications (poster abstract).- 10 SOFHIA: a CAD environment to design digital control systems (poster abstract).- 11 Compiling the language BALSA to delay insensitive hardware (poster abstract).- 12 High-level synthesis of structured data paths (poster abstract).- 13 Characterizing a portable subset of behavioural VHDL-93.- 14 Algebra of communicating timing charts for describing and verifying hardware interfaces.- 15 A formal proof of absence of deadlock for any acyclic network of PCI buses.- 16 Behavioural modelling of sampled-data with HDL-A and ABSynth.- 17 Hardware description languages in practical design flows.- 18 VHDL generation from SDL specification.- 19 Exploiting isomorphism for speeding up instance-binding in an integrated scheduling allocation and assignment approach to architectural synthesis.- 20 Verification of large systems in silicon (special talk).- 21 The Shall Design test Development model for hardware systems.- 22 Modular operational semantic specification of transport triggered architectures.- 23 The world of I/O: a rich application area for formal methods(invited talk).- 24 Abstract modelling of asynchronous micropipeline systems using Rainbow.- 25 A new partial order reduction algorithm for concurrent system verification (short talk).- 26 VHDL power simulator: power analysis at gate level.- 27 Object oriented extensions to VHDL. the LaMI proposal.- Index of contributors.- Keyword index.