1999 International Conference on Computer-Aided Design (Iccad'99)

Sequential and Datapath Optimization; Placement; BDDs in Formal Verification; Analog and Mixed-Signal; Power Optimization; Domino- and ATPG-Based Logic Synthesis; Electrical and Thermal Analysis; Automatic Test Pattern Generation; Routing; Logic-Level Performance Optimization; Practical Issues in Order Reduction; Embedded Tutorial; Timing Optimization; High Level Power Exploration; Analog and Mixed Signal Test; Global Untimed Locally Timed Design