Correct Hardware Design and Verification Methods
Springer Berlin (Verlag)
978-3-540-66559-5 (ISBN)
Invited Talks.- Esterel and Jazz : Two Synchronous Languages for Circuit Design.- Design Process of Embedded Automotive Systems-Using Model Checking for Correct Specifications.- Proof of Microprocessors.- A Proof of Correctness of a Processor Implementing Tomasulo's Algorithm without a Reorder Buffer.- Formal Verification of Explicitly Parallel Microprocessors.- Superscalar Processor Verification Using Efficient Reductions of the Logic of Equality with Uninterpreted Functions to Propositional Logic.- Model Checking.- Model Checking TLA+ Specifications.- Efficient Decompositional Model Checking for Regular Timing Diagrams.- Vacuity Detection in Temporal Model Checking.- Formal Methods and Industrial Applications.- Using Symbolic Model Checking to Verify the Railway Stations of Hoorn-Kersenboogerd and Heerhugowaard.- Practical Application of Formal Verification Techniques on a Frame Mux/Demux Chip from Nortel Semiconductors.- Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics.- Abstraction and Compositional Techniques.- From Asymmetry to Full Symmetry: New Techniques for Symmetry Reduction in Model Checking.- Automatic Error Correction of Large Circuits Using Boolean Decomposition and Abstraction.- Abstract BDDs: A Technique for Using Abstraction in Model Checking.- Theorem Proving Related Approaches.- Formal Synthesis at the Algorithmic Level.- Xs Are for Trajectory Evaluation, Booleans Are for Theorem Proving.- Verification of Infinite State Systems by Compositional Model Checking.- Symbolic Simulation/Symbolic Traversal.- Formal Verification of Designs with Complex Control by Symbolic Simulation.- Hints to Accelerate Symbolic Traversal.- Specification Languages and Methodologies.- Modeling and Checking Networks of CommunicatingReal-Time Processes.- "Have I Written Enough Properties?" - A Method of Comparison Between Specification and Implementation.- Program Slicing of Hardware Description Languages.- Posters.- Results of the Verification of a Complex Pipelined Machine Model.- Hazard-Freedom Checking in Speed-Independent Systems.- Yet Another Look at LTL Model Checking.- Verification of Finite-State-Machine Refinements Using a Symbolic Methodology.- Refinement and Property Checking in High-Level Synthesis Using Attribute Grammars.- A Systematic Incrementalization Technique and Its Application to Hardware Design.- Bisimulation and Model Checking.- Circular Compositional Reasoning about Liveness.- Symbolic Simulation of Microprocessor Models Using Type Classes in Haskell.- Exploiting Retiming in a Guided Simulation Based Validation Methodology.- Fault Models for Embedded Systems.- Validation of Object-Oriented Concurrent Designs by Model Checking.
Erscheint lt. Verlag | 15.9.1999 |
---|---|
Reihe/Serie | Lecture Notes in Computer Science |
Zusatzinfo | XII, 376 p. |
Verlagsort | Berlin |
Sprache | englisch |
Maße | 155 x 235 mm |
Gewicht | 596 g |
Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
Informatik ► Weitere Themen ► Hardware | |
Schlagworte | Complexity • Correct Hardware Design • Formalisierung • Formal Method • formal methods • Formal Verification • Hardcover, Softcover / Informatik, EDV/Hardware • Hardware • Hardwareentwurf • Hardware (Literatur) • HC/Informatik, EDV/Hardware • microprocessor • Model • Model Checking • Simulation • Specification Languages • theorem proving • verification |
ISBN-10 | 3-540-66559-5 / 3540665595 |
ISBN-13 | 978-3-540-66559-5 / 9783540665595 |
Zustand | Neuware |
Haben Sie eine Frage zum Produkt? |
aus dem Bereich