Embedded SoPC Design with NIOS II Processor and Verilog Examples

Dr. Pong P. Chu is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.

Preface Acknowledgments 1 Overview of Embedded System PART I: BASIC DIGITAL CIRCUITS DEVELOPMENT 2 Gate-level Combinational Circuit 3 Overview of FPGA and EDA Software 4 RT-level Combinational Circuit 5 Regular Sequential Circuit 6 FSM 7 FSMD 8 Selected Topics of Verilog PART II: BASIC NOIS II SOFTWARE DEVELOPMENT 9 Nios II Processor Overview 10 NIOS II System Derivation and Low-Level Access 11 Predesigned Nios II I/O Peripherals 12 Predesigned Nios II I/O Drivers and HAL API 13 Interrupt and ISR PART III: CUSTOM I/O PERIPHERAL DEVELOPMENT 14 Custom I/O Peripheral with P/O Cores 15 Avalon Interconnect and SOPC Component 16 SRAM and SDRAM Controllers 17 PS2 Keyboard and Mouse 18 VGA Controller 19 Audio Codec Controller 20 SD Card Controller PART IV: HARDWARE ACCLERATOR CASE STUDIES 21 GCD Accelerator 22 Mandelbrot Set Fractal Accelerator 23 Direct Digital Frequency Synthesis References Topic Index