Art of Hardware Architecture (eBook)

This book highlights the complex issues, tasks and skills that must be mastered by an IP designer, in order to design an optimized and robust digital circuit to solve a problem. The techniques and methodologies described can serve as a bridge between specifications that are known to the designer and RTL code that is final outcome, reducing significantly the time it takes to convert initial ideas and concepts into right-first-time silicon.  Coverage focuses on real problems rather than theoretical concepts, with an emphasis on design techniques across various aspects of chip-design. 

Mohit Arora is a Senior Systems Engineer with Freescale Semiconductor. Since joining Freescale in 2005, he has been responsible for IP/SoC Architecture and has led the design and development of various SoCs for multimarket segment. As a systems engineer, he has been involved in product definition and writing specifications, MCU/MPU-based products for the mid-high end industrial and consumer market space. Prior to joining Freescale, he worked for Agilent Technologies, ST Microelectronics and DCM Technologies as a design engineer and lead, focused on printing ASICs, USB2.0 PHY, PCI-Express, Infiniband and Serial ATA protocols.

He earned a Bachelor's degree in Electronics and Communication Engineering from Netaji Subhas Institute of Technology (NSIT), India, in 2000, has more than 30 publications in international magazine and holds a patent on serial links.

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This book highlights the complex issues, tasks and skills that must be mastered by an IP designer, in order to design an optimized and robust digital circuit to solve a problem. The techniques and methodologies described can serve as a bridge between specifications that are known to the designer and RTL code that is final outcome, reducing significantly the time it takes to convert initial ideas and concepts into right-first-time silicon. Coverage focuses on real problems rather than theoretical concepts, with an emphasis on design techniques across various aspects of chip-design.