Solutions on Embedded Systems (eBook)

Massimo Conti is Associate Professor at Università Politecnica delle Marche, Ancona, Italy. His research activity in the field of Microelectronics is devoted to:  System Level design methodologies of low power Integrated Circuits, Wireless Sensor Networks, Statistical simulations at device level of IC, Design of mixed-signal IC. He has published more than 130 papers in books, journals or conferences. Simone Orcioni is Assistant Professor at Università Politecnica delle Marche, teaching courses in analog and digital electronics. He has published a text book and about ninety international papers. He has been working in statistical device modeling and simulation and analog circuit design. His research interests include also RF, non-linear systems and system level circuit design.Natividad Martínez Madrid is Professor for Internet Technologies at Reutlingen University (Germany). Her main research areas are: Service integration platforms, virtualisation of management environments, model-based design, and safety and emergency services. She worked as project coordinator or principal researcher in several national and international projects. She was member of the technology platforms eNEM and PROMETEO as well as founding member and Steering Board Member of the OSGi-Users Group in Spain. Natividad published more than 60 articles in books, journals or conferences.Ralf Seepold is Chair for Ubiquitous Computing at the University of Applied Sciences HTWG in Konstanz (Germany). He is working in the domain of mobile service integration, model-driven design, virtualisation of management environments and distributed sensor networks. Ralf has experience as principal researcher or coordinator in several international projects running in the European Framework Programme or under a EUREKA label (ITEA, MEDEA). He is editor of five books, contributor to several book sections, and principal author of more than 50 articles published in international journals and conferences.

Preface 5
Contents 6
Part I Sensor Networks 9
1 Performance of Gossip Algorithms in Wireless Sensor Networks 10
1.1…Introduction 10
1.2…The Considered Gossip Algorithms 12
1.2.1 Basic Gossip 12
1.2.2 Push-Sum Algorithm 13
1.2.3 Broadcast Algorithm 14
1.3…Simulation Parameters 15
1.4…Share Factor Optimization 16
1.5…Results 19
1.5.1 Basic Gossip 19
1.5.2 Push-Sum Algorithm 20
1.5.3 Broadcast Algorithm 21
1.5.4 Performance Comparison 22
1.6…Conclusion 22
References 23
2 Using a Prioritized Medium Access Control Protocol for Incrementally Obtaining an Interpolation of Sensor Readings 24
2.1…Introduction 24
2.2…Preliminaries and Motivation 26
2.2.1 The Main Idea 28
2.2.2 System Model 29
2.3…Interpolation of Sensor Data with Location 30
2.3.1 Previously Known Algorithm 30
2.3.2 New Algorithm 34
2.3.3 An Improved Version of the New Algorithm 35
2.4…Conclusions 37
Acknowledgements 37
References 37
3 Embedded Systems in the Poseidon MK6 Rebreather 39
3.1…Introduction 39
3.2…Methods 41
3.2.1 Mechanical Design of the System 41
3.2.2 Embedded Systems in the MK6 41
3.2.2.1 Backpack 43
3.2.2.2 Handset 44
3.2.2.3 Battery 44
3.2.2.4 HUD 44
3.2.2.5 Communication 44
3.2.2.6 Firewall 45
3.2.3 Algorithms 45
3.2.3.1 State Machine 45
3.2.3.2 Pre-dive Checks 45
3.2.3.3 p{{{/rm{O}}_{2} }} Control Algorithm 46
3.2.3.4 Sensor Signal Validation 47
3.2.3.5 Controlling Resource Algorithm 47
3.2.3.6 Software Update 48
3.3…Results 48
3.4…Discussion 48
3.5…Outlook/Ongoing Work 48
References 50
4 Embedded Data Logging Platform for Research in Diving Physiology 51
4.1…Introduction 51
4.2…Methods 53
4.2.1 Hardware 53
4.2.2 Data Logging Module 53
4.2.3 sO2 Measurement 54
4.2.4 ECG Measurement 55
4.2.5 Software 56
4.2.5.1 Firmware 56
4.3…Data Processing 58
4.3.1 Validation 59
4.4…Results 60
4.5…Discussion 61
4.6…Conclusions 62
4.7…Future Work 62
References 63
5 IEEE 1451 Sensor Interfacing and Data Fusion in Embedded Systems 64
5.1…Introduction 64
5.2…IEEE 1451 Smart Network Sensor System 64
5.3…Networked Gas Leak Sensing System 66
5.4…Sensor Selection, Model and Data Fusion 69
5.5…Embedded ISIF Design and Realization 72
5.6…Conclusions 77
References 77
Part II Network on Chip and Multicore Systems 79
6 Cost-Based Deflection Routing for Intelligent NoC Switches 80
6.1…Introduction 80
6.2…Related Work 81
6.3…Cost Based Routing 83
6.4…Cost Function Design 84
6.4.1 Deflection Routing 84
6.4.2 Fault-Tolerant Routing 85
6.4.3 Load Balancing 85
6.5…Efficient Implementation 86
6.6…Communication Performance 89
6.6.1 Experimental Setup 89
6.6.2 Latency and Throughput 90
6.6.3 Fault-Tolerance 91
6.6.4 Benefits from Load Balancing 92
6.7…Conclusion 92
References 93
7 NOCEXplore 94
7.1…Introduction 94
7.2…The Platform 96
7.3…Investigations 98
7.3.1 Statistical Analysis 98
7.3.2 Probabilistic Analysis 100
7.3.3 Dynamic Analysis 100
7.3.4 Power Analysis 101
7.4…NOCEXplore Usage 103
7.5…Post-processing 104
7.6…Conclusions 106
References 106
8 Coverage-Driven Verification of HDL IP Cores 108
8.1…Introduction 108
8.2…Reusable Methodology for the Functional Verification of Platforms 110
8.3…Spidergon NoC Communication Design 112
8.4…Verification Environment for the Spidergon STNoC Router IP 114
8.5…Results and Conclusions 119
References 121
9 A Multiprocessor Platform for Efficient Data Processing in Electronic Musical Instruments 123
9.1…Introduction 123
9.2…Multiprocessor Architecture 124
9.3…Developing the Communication 125
9.4…Exploring the Functionality 127
9.4.1 Keyboard Scanning Implementation 128
9.4.2 The Standard Scanning Algorithm 129
9.4.3 The Optimized Scanning Algorithm 129
9.4.4 Some Variations to the Scanning Algorithms 131
9.4.5 Simulations and Results 132
9.5…Conclusion 135
References 135
10 A Distributed Hardware Algorithm for Scheduling Dependent Tasks on Multicore Architectures 136
10.1…Introduction 136
10.2…Examples 138
10.3…Related Work 139
10.4…Algorithm 140
10.4.1 DECLARE Operation 143
10.4.2 REQUIRE Operation 143
10.4.3 PROVIDE Operation 144
10.4.4 Event File 145
10.4.5 Migration 145
10.5…Experimental Setup 146
10.6…Results 147
10.7…Conclusions 150
Acknowledgments 151
References 151
Part III Automotive 153
11 Automotive Embedded Systems 154
11.1…Introduction 154
11.2…The Time-Triggered Architecture 155
11.2.1 The Time-Triggered Computation Model 155
11.2.2 Time-Triggered Versus Event-Triggered Architecture 156
11.2.3 Time-Triggered Communication 158
11.3…FlexRay and the Integration Challenges 159
11.3.1 The FlexRay Host Interface 159
11.3.2 Integration Within the Node’s Software---The Challenges 160
11.4…TEODACS Development Process 162
11.4.1 TEODACS Development Platforms FlexRayXpert.Lab and FlexRayXpert.Sim 162
11.4.2 The TEODACS Development Flow 163
11.4.3 FIBEX Database Format 164
11.4.4 Automated Configuration of the FlexRay Communication Stack 165
11.4.5 Implementation of the FlexRay Communication Stack 167
11.5…Conclusion 168
Acknowledgments 168
References 168
12 An Embedded Datalogger with a Fast Acquisition Rate for In-vehicle Testing and Monitoring 171
12.1…Introduction 171
12.2…Application Requirements 172
12.3…Hardware Architecture 173
12.4…Firmware Description 176
12.4.1 AVR Firmware 176
12.4.2 ARM Firmware 178
12.5…Implementations and Tests 180
12.6…Conclusions 181
References 181
13 Secure Gateway Interoperability 183
13.1…Introduction 183
13.2…State of the Art 184
13.3…Network Service Access System Overview 185
13.4…The NSA Architecture 186
13.4.1 The Control Point Behaviour 187
13.4.2 Access Modules 188
13.5…Security in the NSA 189
13.6…Security Subsystem Prototype 191
13.6.1 Security Manager 191
13.6.2 Security Agent 191
13.7…Event Manager Prototype 193
13.7.1 Subscription Manager 194
13.7.2 Notification Manager 195
13.8…Conclusions 195
References 196
Part IV Software and System Architecture 197
14 Applying Bayesian Networks for Intelligent Adaptable Printing Systems 198
14.1…Introduction 198
14.2…Preliminaries 200
14.3…Setpoint Estimation 201
14.3.1 Description of the Problem 201
14.3.2 Experimental Setup 201
14.3.3 Case 1: Keep Paper Temperature on Setpoint 202
14.3.4 Case 2: Avoid Faulty Temperatures 203
14.4…Dynamic Speed Adjustment 204
14.4.1 Description of the Problem 204
14.4.2 Modelling 204
14.4.3 Classification 206
14.4.4 Simulation of the Bayesian Controller 206
14.5…Discussion and Conclusions 207
Acknowledgements 209
References 209
15 Applicability of Virtualization to Embedded Systems 211
15.1…Introduction 211
15.2…Virtualization Techniques 212
15.2.1 Virtual Machines 212
15.2.2 Virtual Machine Monitors 213
15.2.3 Paravirtualization 214
15.2.4 Microkernel-Based Paravirtualization 215
15.3…Requirements (and Non-requirements) for an Embedded VMM 216
15.3.1 Isolation and Communication 216
15.3.2 Architecture Independence 216
15.3.3 Size of Trusted Code Based 217
15.3.4 Superfluous Functionality 218
15.3.5 Real-Time Capabilities 218
15.4…Conclusion and Outlook 220
References 221
16 Distributed Trading Architecture with Sensors Support for a Secure Decision Making 223
16.1…Introduction 223
16.2…Measuring a Trader’s Stress 224
16.3…Trading Architecture with Sensors Support 226
16.4…Expert System 229
16.5…Knowledge Base Structure 230
16.5.1 Technical Analysis 230
16.5.2 Fundamental Analysis 232
16.5.3 Feeling Market Analysis 233
16.5.4 Feeling Sense of the User (with the Sensors) 233
16.6…Conclusions and Future Work 234
References 234
17 Migrating from a Proprietary RTOS to the OSEK Standard Using a Wrapper 236
17.1…Introduction 236
17.2…Related Work 237
17.3…Migration Strategy 238
17.4…Construction of the Wrapper 238
17.4.1 Task Model 239
17.4.1.1 Requirements 239
17.4.1.2 Wrapper Implications 240
17.4.2 The Scheduler 240
17.4.2.1 Requirements 240
17.4.2.2 Wrapper Implications 241
17.4.3 Events 241
17.4.3.1 Requirements 241
17.4.3.2 Wrapper Implications 241
17.4.4 Resources 241
17.4.4.1 Requirements 241
17.4.4.2 Wrapper Implications 242
17.4.5 Interrupts 242
17.4.5.1 Requirements 242
17.4.5.2 Wrapper Implications 242
17.4.6 Counters and Alarms 242
17.4.6.1 Requirements 242
17.4.6.2 Wrapper Implications 243
17.4.7 Compliance of the Wrapper 243
17.5…Migrating the Application 243
17.6…Experimental Set-Up 244
17.6.1 Worst Case Impact of the Wrapper 244
17.6.1.1 Response Time Overhead of the Task Model 244
17.6.1.2 Response Time Overhead of the Event Mechanism 244
17.6.1.3 Response Time Overhead of the Resource Mechanism 244
17.6.1.4 Memory Impact of the OSEK-Wrapper 245
17.6.2 Impact of the Wrapper on the System 245
17.6.2.1 Execution Time of Tasks 245
17.6.2.2 Number of Activations of a Task 245
17.6.2.3 Memory Impact of the Wrapper 245
17.7…Case Study 246
17.7.1 Construction 246
17.7.2 Worst Case Impact of the Wrapper 246
17.7.3 Impact of the Wrapper on the System 247
17.7.4 Threats to Validity 248
17.7.4.1 Internal Validity 248
17.7.4.2 External Validity 248
17.8…Conclusion 248
References 249
Part V Power Aware Design 250
18 A Sigma--Delta Controlled Power Converter for Energy Harvesting Applications 251
18.1…Introduction 251
18.2…System Specifications and Design 252
18.3…AC--DC Stage 254
18.4…DC--DC Stage 256
18.5…Dynamic OSR Sigma Delta Modulation and MPPT 258
18.6…System Modelling and Simulations 260
18.7…Conclusion 263
References 263
19 Energy Efficient Data Transmission of On-Chip Serial Links 265
19.1…Introduction 265
19.2…State of the Art 266
19.3…Energy-Delay Efficient Bus Encoding 268
19.3.1 Temporal Coding Using Block Decoding 268
19.3.2 Temporal Coding Using Narrow Links 272
19.4…Implementation and Evaluation Results 274
19.5…Conclusions 276
References 277
20 Powersim: Power Estimation with SystemC 279
20.1…Introduction 279
20.2…Powersim 280
20.3…Case Study 282
20.3.1 The ETSI Front-End 282
20.3.1.1 First Noise Reduction 283
20.3.1.2 Second Noise Reduction 286
20.3.1.3 Waveform Processing 287
20.3.1.4 Cepstrum Calculation 288
20.3.1.5 Blind Equalization 290
20.3.2 Computational Complexity Estimate 290
20.4…Conclusions 294
References 294
21 Power Analysis of Embedded Systems 295
21.1…Introduction 295
21.2…Simulative Approach and Relations with the SystemC Kernel 296
21.3…Power_Modules 297
21.4…Power Models and Their Characterization 298
21.5…Augmented Signals 299
21.6…Application Example on Bluetooth Communication Performances 301
21.7…Conclusions 307
References 308