Security in Embedded Devices (eBook)

Security in EmbeddedDevices 1
Preface 4
1 Where Security Began 10
1.1 A Brief History of Cryptography 14
1.2 Brief History of the Side Channel 18
1.3 Summary 20
References 20
2 Introduction to Secure Embedded Systems 22
2.1 Contact Chip Card or Smart Card 26
2.2 Contactless SmartCards and RFID Tags 27
2.3 Cell Phones and PDAs 29
2.4 Automobiles 30
2.5 Game Stations 32
2.6 Satellites 33
2.7 FPGA, Networks on a Chip 33
2.8 Summary 34
References 35
3 The Key 37
3.1 Key Randomness 38
3.2 Physically Unclonable Functions 40
3.3 Key Lifetime, Freshness, Updating 43
3.4 Key Length 44
3.5 Key Storage and Authentication Issues 47
3.6 Key Types 48
3.7 Trusted Platform Module (TPM) 49
3.8 Network on Chip Security 51
3.9 Summary 55
References 56
4 Using Keys 57
4.1 No Shared Keys 59
4.2 Using a Preexisting Shared Key 61
4.3 Using Keys in Conventional Crypto 62
4.3.1 Needham--Schroeder 64
4.3.2 Kerberos 65
4.4 Public Key Approaches 66
4.4.1 Protocols 67
4.4.1.1 Basic Encrypt 67
4.4.1.2 Digital Signature 68
4.4.1.3 Key Establishment, Certificates, and Protocols 70
4.4.2 Mathematics Behind PKC 72
4.4.2.1 Crypto Based on the Integer Factorization Problem 72
4.4.2.2 Crypto Based on Discrete Logarithm 76
References 81
5 Elliptic Curve Protocols 82
5.1 High-Level Elliptic Curve Computations 86
5.1.1 Performance Improvements 89
5.2 The Mathematics Behind Elliptic Curves 91
5.2.1 The Curve Over a Field 91
5.2.1.1 Prime Fields 92
5.2.1.2 Binary Fields 93
5.2.2 Point Computations 96
5.2.2.1 Point Computations Over Prime Field 97
5.2.2.2 Point Computations Over Binary Field 97
5.2.3 Improving Performance 100
5.2.3.1 Coordinate Representation 102
5.2.3.2 Field Computations 105
5.3 EC Protocols 107
5.4 Embedded Implications 112
References 114
6 Symmetric Key Protocols Including Ciphers 117
6.1 The Theory of a Cipher 117
6.2 Block Ciphers 121
6.2.1 Rijndael: The Advanced Encryption Standard 122
6.2.1.1 Sub Bytes Function 123
6.2.1.2 Shift Row Function 124
6.2.1.3 Mix Column Function 125
6.2.1.4 High-Speed AES Software Implementation 127
6.2.2 CAST 128
6.2.3 TEA 130
6.2.4 HIGHT 131
6.2.5 PRESENT Cipher 133
6.3 Stream Ciphers 134
6.3.1 Stream Cipher Principles 135
6.3.2 RC4 137
6.3.3 Grain 138
6.4 Cipher Modes of Operation 139
6.5 Authenticated Modes for Encryption 142
6.6 Embedded Systems Implications 144
References 147
7 Data Integrity and Message Authentication 149
7.1 Properties of Hash and MAC 151
7.2 The Structure of Integrity and Authentication Functions 154
7.2.1 The SHA-2 Function 158
7.3 Integrity Trees 160
7.4 Embedded Implications 163
References 166
8 Side Channel Attacks on the Embedded System 168
8.1 The Side Channel 168
8.1.1 Theory of the Side Channel 169
8.1.2 The Side Channel Attack in Practice 171
8.1.2.1 EM Probe 173
8.1.2.2 The Oscilloscope 176
8.1.2.3 Device and Trigger 178
8.1.3 Setting up a SCA 179
8.2 What is Simple Analysis 181
8.3 Differential Analysis 184
8.4 Correlation Analysis 194
8.5 Differential Frequency Analysis 195
8.6 Experiments on PDAs 196
8.6.1 EM Results 200
8.6.1.1 SEMA of AES on the PDA 202
8.6.1.2 Truncated code Analysis of the PDA 208
8.6.1.3 Attack of the Device Using Full AES 214
8.7 Experiments with Contactless Chip Cards 220
8.8 The SCA Timeline and Future Technologies 223
References 225
9 Countermeasures 228
9.1 Misalignment Countermeasures 229
9.2 Masking Countermeasures 233
9.2.1 S-Box Output Masking 235
9.2.2 Evaluating Countermeasures and Higher Order Analysis 240
9.2.3 Address Masking of S-Box 248
9.3 Countermeasures for Public Key Cryptography 252
9.4 Summary 259
Appendix A: Second-Order S-box Differential Analysis Derivation 260
Appendix B: Derivation of Third-Order S-box Differential Analysis Statistic 262
References 265
10 Reliable Testable Secure Systems 267
10.1 Reliability and Fault Tolerance 269
10.2 SEU-Resistant FPGA Design 273
10.3 SEU-Resistant AES Design 275
10.4 SEU-Resistant SHA-2 Design 279
10.5 Reliable Key Recovery for Satellites 281
10.5.1 Satellite Recovery from Faults and Attacks 283
10.5.1.1 Hash Approach 284
10.5.1.2 Trusted Modules Approach 285
10.6 Testable and FPGA Security 289
10.7 Summary 291
References 291
11 Summary, Standards, and Ongoing Efforts 294
References 297
Index 298